Re: [Discuss-gnuradio] About Latency

[Jeff Brower]

KC Huang-

> I have two questions about Gnuradio latency:
> 
> 1. In transmit path, the USB delay is constant due to the 32KB buffer
> between "signal source output" and "USB". If the sampling rate is 1MS/s and
> each sample is complex 16 bits( sample size=4bytes), we can get the USB
> latency = 8ms. But how do we estimate the delay of signal processing by
> processor and USRP? I think these delays are variable depending on how
> complex the signal is and how fast the processor is. But are there any ways
> to determine what is the range of these delays?

Compared to PC data transfer, FPGA logic delays should be negligible.  For 
example,
FIR filtering in FPGA logic contributes at least one clock cycle per sample to
latency (64 MHz clock).  It could be more than one clock per, but I don't know 
the
FPGA code and the Cyclone (which is an old FPGA) well enough to say whether 
Matt was
able to implement single-cycle MAC.  To get some idea of comparison, depending 
on how
it's implemented, a 16-tap FIR filter might add from 250 nsec to a few usec.

-Jeff

> 2. fusb_options define two parameters of "fusb_nblocks" and "fusb_block_size".
> This function should be used to decrease the delay of USB. But, if we choose
> any value of number of blocks and block size, say, nblock=8 and block_size
> =2048, does that mean we need to have larger time to pass through the 8*2048
> Bytes packet than the smallest allowed 512 Bytes? So, in this logic, the
> latency of usb will increase although the throughput is increased. Am I
> correct? If not, what's wrong with my thought?
> 
> Thanks for ur reply advance!!
> 
> KC Huang