On Tue, Jan 4, 2011 at 1:13 PM, peng senl
<address@hidden> wrote:
|
Hello,
I get a question about the half band
filter in the DDC. I found that the LO (local oscillator) in my
daughter board is set at 0.2MHz less than the carrier center
frequency, which means that the IF of the output signal is center at
0.2 MHz.
I am assuming the NCO in the FPGA is
generating a sinusoid at 0.2MHz to mix the IF signal to base band.
Then we would get a base band signal and a high order frequency part
at 0.4MHz. But the half band filter after the CIC filter has a pass
band of 0.6MHz from the reference materials what I have read. This
means that the high order part won't be filtered by the HBF. |
It's generating a _complex_ sinusoid. It's not modulating the signal like an analog LO but performing complex multiplication.
Tom