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[Help-gnucap] Unstable inverter isn't unstable
From: |
Orestes Mas |
Subject: |
[Help-gnucap] Unstable inverter isn't unstable |
Date: |
Wed, 05 Mar 2014 12:14:55 +0100 |
User-agent: |
KMail/4.11.5 (Linux/3.11.0-15-generic; KDE/4.11.5; x86_64; ; ) |
Hello,
Last week, I gave a simulation assignment to my students. It consisted on
simulating a simple OpAmp-based inverting amplifier. I suggested them to use a
uA741 macromodel to simulate the OA instead of a simple high-gain VCVS. The
macromodel was based on the PSpice one, slightly modified to get rid of 2 CCCS-
and VCVS- POLY sources this macromodel has inside (modified model attached).
One of my students made the obvious mistake of exchanging the 2 inputs of the
operational amplifier, thus simulating "de-facto" an Schmitt trigger circuit.
But, to my surprise, the simulation results didn't show the Operational
Amplifier
saturation, but linear behaviour!
The circuit is as follows:
* Inverter amplifier
.INCLUDE uA741.model
Vg 1 0 DC 1V
R1 1 2 68k
R2 2 3 204k
Vccp 4 0 DC 15V
Vccn 0 5 DC 15V
X1 2 0 4 5 3 uA741 (Inputs exchanged)
.PRINT DC V(3)
.DC Vg -2 2 0.5
.END
The simulation results are (!)
(using Gnucap 2009.12.07 RCS 26.136)
gnucap> DC vg -2 2 0.5
# v(3)
-2. 6.0163
-1.5 4.5163
-1. 3.0162
-0.5 1.5162
0. 0.016187
0.5 -1.4838
1. -2.9839
1.5 -4.4839
2. -5.9839
Strangely, if I extend the DC range, results are correct or, at least, it seems
to
behave like a Schmitt trigger:
gnucap> DC Vg -5 5 0.5
# V(3)
-5. -14.613
-4.5 -14.613
-4. -14.613
-3.5 -14.613
-3. -14.613
-2.5 -14.613
-2. -14.613
-1.5 -14.613
-1. -14.613
-0.5 -14.613
0. -14.613
0.5 -14.613
1. -14.613
1.5 -14.613
2. -14.613
2.5 -14.613
3. -14.613
3.5 -14.613
4. -14.613
4.5 -14.613
did not converge
5. -14.983
Can you please elaborate on this behaviour? I know that, when dealing with an
Schmitt trigger, you have to specify the initial (output) state to be abple to
calculate things properly, but I assumed (perhaps erroneously) that GnuCap's
solver
should find the correct output after some iterations starting from a zero
output.
Am I wrong? How should I do to simulate this circuit properly and obtain the
correct
result?
Thanks,
Orestes Mas.
The modified PSpice macromodel:
*-------------------------------------------------------------------------------
* Library of linear IC definitions
* This is a reduced version of MicroSim's linear subcircuit library.
* You are welcome to make as many copies of it as you find convenient.
*
* The parameters in the opamp library were derived from the data sheets for
* each part. The macromodel used is similar to the one described in:
*
* Macromodeling of Integrated Circuit Operational Amplifiers
* by Graeme Boyle, Barry Cohn, Donald Pederson, and James Solomon
* IEEE Journal of SoliE-State Circuits, Vol. SC-9, no. 6, Dec. 1974
*
* Differences from the reference (above) occur in the output limiting stage
* which was modified to reduce internally generated currents associated with
* output voltage limiting, as well as short-circuit current limiting.
*
* The opamps are modelled at room temperature and do not track changes with
* temperature. This library file contains models for nominal, not worst case,
* devices.
*
*$
*-----------------------------------------------------------------------------
* connections: non-inverting input
* | inverting input
* | | positive power supply
* | | | negative power supply
* | | | | output
* | | | | |
.subckt uA741 1 2 3 4 5
*
c1 11 12 8.661E-12
c2 6 7 30.00E-12
dc 5 53 dx
de 54 5 dx
dlp 90 91 dx
dln 92 90 dx
dp 4 3 dx
* I've had to rewrite these 2 sources because pspice2 POLY fonts aren't
supported
* in neither ng-spice nor gnucap
* Original font, commented out
* egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
egnd1 99 98 3 0 .5
egnd2 98 0 4 0 .5
* Original font, commented out
* fb 7 99 poly(5) vb vc ve vlp vln 0 10.61E6 -10E6 10E6 10E6 -10E6
fb1 7 99 vb 10.61E6
fb2 7 99 vc -10E6
fb3 7 99 ve 10E6
fb4 7 99 vlp 10E6
fb5 7 99 vln -10E6
ga 6 0 11 12 188.5E-6
- [Help-gnucap] Unstable inverter isn't unstable,
Orestes Mas <=