Re: Parsing makefiles.

[John Graham-Cumming]

Fredrik Carlsson wrote:
> I have alot of makefiles (part of a packagesystem) that i need to parse 
> and extract relevant information. The variables in these makefiles is 
> not just plain text but they also contain variables ex "EXAMPLE= 
> ${EXP:S/-/-server-/}" so i need to use make to process the Makefile 
> whitout building the application(the variables need to be in "text" form 
> EXAMPLE = rr-123 and not EXAMPLE = ${EXP....} and then parse the 
> makefile whit my program.

If you are using GNU Make 3.80 (or above) then there's a special 
variable called .VARIABLES that lists all the variables defined in the 
Makefile.

You could add a rule (print-vars) to the Makefile that would print out 
all the variables in the format you want.   For example,

 .PHONY: printvars
 printvars:
        @$(foreach V,$(sort $(.VARIABLES)),
         $(if $(filter-out environment% default automatic,
         $(origin $V)),$(warning $V=$($V) ($(value $V)))))

I wrote about this in detail in my monthly CM Crossroads column here: 
http://www.cmcrossroads.com/ubbthreads/showflat.php?Number=29581

John.
--
John Graham-Cumming
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