[Qemu-devel] Re: [patch] CPU architecture selection

[Blue Swirl]

Here's my view on the Sparc side. The selection could be done from the real 
CPUs or only from some subset that are different in features. In some cases 
the FPU is external and can therefore be different. MMU version is linked to 
CPU version. For example some *BSD didn't boot until all three versions 
matched a real-life combination. Some Sparcs have a different register 
window size, which the kernels may probe or "know" from CPU version.

The CPU and FPU list could be the same as Linux (arch/sparc/kernel/cpu.c) 
and they would set the IU implementation and version numbers 
(target-sparc/cpu.h, macro GET_PSR), FPU version (not implemented yet, 
affects target-sparc/op.c, ldfsr/stfsr or op_helper.c, helper_ld/stfsr, 
translate.c, cpu_reset) and MMU version (target-sparc/translate.c, 
cpu_reset). If there is no FPU, all FP ops should cause a fault and FPU 
can't be enabled. Some CPUs don't implement all instructions, like 
multiplication and division, likewise for FPUs. The window size affects many 
places, code assumes that the window size is power of 2. Early MMUs had 
software-managed caches, could be pain to implement. Some of the parameters 
should be passed to kernel via Openprom device tree. Earliest HW had some 
bugs.

Simpler selection could be: make CPU version fixed and just allow disabling 
the FPU.

Anyway, disabling CPU/FPU features and making window size variable will 
decrease performance and offer very little to gain, I'm not sure if its 
worth it except for testing purposes. The CPUs are not very different. In my 
view, it's better to emulate the instructions in Qemu rather than Qemu 
trapping an instruction causing the emulated kernel to emulate the 
instruction. But if you (or Fabrice) see more added value here, I'm ready to 
help you with the changes.

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