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[Qemu-devel] [PATCH v5 01/18] Convert CPU_PC_FROM_TB to static inline
From: |
Jan Kiszka |
Subject: |
[Qemu-devel] [PATCH v5 01/18] Convert CPU_PC_FROM_TB to static inline |
Date: |
Mon, 17 Nov 2008 17:18:58 +0100 |
User-agent: |
StGIT/0.14.2 |
...as macros should be avoided when possible.
Signed-off-by: Jan Kiszka <address@hidden>
---
cpu-exec.c | 4 ++--
target-alpha/cpu.h | 6 +++++-
target-arm/cpu.h | 8 ++++++--
target-cris/cpu.h | 9 +++++++--
target-i386/cpu.h | 8 ++++++--
target-m68k/cpu.h | 8 ++++++--
target-mips/cpu.h | 12 +++++++-----
target-ppc/cpu.h | 8 ++++++--
target-sh4/cpu.h | 12 +++++++-----
target-sparc/cpu.h | 12 +++++++-----
10 files changed, 59 insertions(+), 28 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 9265fc1..322af0d 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -110,7 +110,7 @@ static void cpu_exec_nocache(int max_cycles,
TranslationBlock *orig_tb)
if ((next_tb & 3) == 2) {
/* Restore PC. This may happen if async event occurs before
the TB starts executing. */
- CPU_PC_FROM_TB(env, tb);
+ cpu_pc_from_tb(env, tb);
}
tb_phys_invalidate(tb, -1);
tb_free(tb);
@@ -654,7 +654,7 @@ int cpu_exec(CPUState *env1)
int insns_left;
tb = (TranslationBlock *)(long)(next_tb & ~3);
/* Restore PC. */
- CPU_PC_FROM_TB(env, tb);
+ cpu_pc_from_tb(env, tb);
insns_left = env->icount_decr.u32;
if (env->icount_extra && insns_left >= 0) {
/* Refill decrementer and continue execution. */
diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h
index 210cc55..f606fac 100644
--- a/target-alpha/cpu.h
+++ b/target-alpha/cpu.h
@@ -318,6 +318,7 @@ static inline void cpu_clone_regs(CPUState *env,
target_ulong newsp)
#endif
#include "cpu-all.h"
+#include "exec-all.h"
enum {
FEATURE_ASN = 0x00000001,
@@ -416,6 +417,9 @@ void call_pal (CPUState *env);
void call_pal (CPUState *env, int palcode);
#endif
-#define CPU_PC_FROM_TB(env, tb) env->pc = tb->pc
+static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+{
+ env->pc = tb->pc;
+}
#endif /* !defined (__CPU_ALPHA_H__) */
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index c182245..79e51ac 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -415,8 +415,12 @@ static inline void cpu_clone_regs(CPUState *env,
target_ulong newsp)
}
#endif
-#define CPU_PC_FROM_TB(env, tb) env->regs[15] = tb->pc
-
#include "cpu-all.h"
+#include "exec-all.h"
+
+static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+{
+ env->regs[15] = tb->pc;
+}
#endif
diff --git a/target-cris/cpu.h b/target-cris/cpu.h
index 1a8c884..19cb209 100644
--- a/target-cris/cpu.h
+++ b/target-cris/cpu.h
@@ -237,7 +237,12 @@ static inline void cpu_clone_regs(CPUState *env,
target_ulong newsp)
#define SFR_RW_MM_TLB_LO env->pregs[PR_SRS]][5
#define SFR_RW_MM_TLB_HI env->pregs[PR_SRS]][6
-#define CPU_PC_FROM_TB(env, tb) env->pc = tb->pc
-
#include "cpu-all.h"
+#include "exec-all.h"
+
+static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+{
+ env->pc = tb->pc;
+}
+
#endif
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 2e21bc3..ead073c 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -789,10 +789,14 @@ static inline void cpu_clone_regs(CPUState *env,
target_ulong newsp)
}
#endif
-#define CPU_PC_FROM_TB(env, tb) env->eip = tb->pc - tb->cs_base
-
#include "cpu-all.h"
+#include "exec-all.h"
#include "svm.h"
+static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+{
+ env->eip = tb->pc - tb->cs_base;
+}
+
#endif /* CPU_I386_H */
diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index a6687b1..48c752c 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -231,8 +231,12 @@ static inline void cpu_clone_regs(CPUState *env,
target_ulong newsp)
}
#endif
-#define CPU_PC_FROM_TB(env, tb) env->pc = tb->pc
-
#include "cpu-all.h"
+#include "exec-all.h"
+
+static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+{
+ env->pc = tb->pc;
+}
#endif
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index d686f8e..a2544b1 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -502,6 +502,7 @@ static inline void cpu_clone_regs(CPUState *env,
target_ulong newsp)
}
#include "cpu-all.h"
+#include "exec-all.h"
/* Memory access type :
* may be needed for precise access rights control and precise exceptions.
@@ -563,10 +564,11 @@ CPUMIPSState *cpu_mips_init(const char *cpu_model);
uint32_t cpu_mips_get_clock (void);
int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc);
-#define CPU_PC_FROM_TB(env, tb) do { \
- env->active_tc.PC = tb->pc; \
- env->hflags &= ~MIPS_HFLAG_BMASK; \
- env->hflags |= tb->flags & MIPS_HFLAG_BMASK; \
- } while (0)
+static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+{
+ env->active_tc.PC = tb->pc;
+ env->hflags &= ~MIPS_HFLAG_BMASK;
+ env->hflags |= tb->flags & MIPS_HFLAG_BMASK;
+}
#endif /* !defined (__MIPS_CPU_H__) */
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 00eac07..1ffbc30 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -826,9 +826,8 @@ static inline void cpu_clone_regs(CPUState *env,
target_ulong newsp)
}
#endif
-#define CPU_PC_FROM_TB(env, tb) env->nip = tb->pc
-
#include "cpu-all.h"
+#include "exec-all.h"
/*****************************************************************************/
/* CRF definitions */
@@ -1432,4 +1431,9 @@ enum {
/*****************************************************************************/
+static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+{
+ env->nip = tb->pc;
+}
+
#endif /* !defined (__CPU_PPC_H__) */
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 2f42e60..ed7c105 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -173,12 +173,8 @@ static inline void cpu_clone_regs(CPUState *env,
target_ulong newsp)
}
#endif
-#define CPU_PC_FROM_TB(env, tb) do { \
- env->pc = tb->pc; \
- env->flags = tb->flags; \
- } while (0)
-
#include "cpu-all.h"
+#include "exec-all.h"
/* Memory access type */
enum {
@@ -269,4 +265,10 @@ static inline int cpu_ptel_pr (uint32_t ptel)
#define PTEA_TC (1 << 3)
#define cpu_ptea_tc(ptea) (((ptea) & PTEA_TC) >> 3)
+static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+{
+ env->pc = tb->pc;
+ env->flags = tb->flags;
+}
+
#endif /* _CPU_SH4_H */
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index c13926d..4779e34 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -491,12 +491,8 @@ static inline void cpu_clone_regs(CPUState *env,
target_ulong newsp)
}
#endif
-#define CPU_PC_FROM_TB(env, tb) do { \
- env->pc = tb->pc; \
- env->npc = tb->cs_base; \
- } while(0)
-
#include "cpu-all.h"
+#include "exec-all.h"
/* sum4m.c, sun4u.c */
void cpu_check_irqs(CPUSPARCState *env);
@@ -508,4 +504,10 @@ uint64_t cpu_tick_get_count(void *opaque);
void cpu_tick_set_limit(void *opaque, uint64_t limit);
#endif
+static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
+{
+ env->pc = tb->pc;
+ env->npc = tb->cs_base;
+}
+
#endif
- [Qemu-devel] [PATCH v5 03/18] gdbstub: Return appropriate watch message to gdb, (continued)
- [Qemu-devel] [PATCH v5 03/18] gdbstub: Return appropriate watch message to gdb, Jan Kiszka, 2008/11/17
- [Qemu-devel] [PATCH v5 13/18] x86: Debug register emulation, Jan Kiszka, 2008/11/17
- [Qemu-devel] [PATCH v5 04/18] Refactor and enhance break/watchpoint API, Jan Kiszka, 2008/11/17
- [Qemu-devel] [PATCH v5 15/18] gdbstub: Add vCont support, Jan Kiszka, 2008/11/17
- [Qemu-devel] [PATCH v5 17/18] gdbstub: x86: Support for setting segment registers, Jan Kiszka, 2008/11/17
- [Qemu-devel] [PATCH v5 01/18] Convert CPU_PC_FROM_TB to static inline,
Jan Kiszka <=
- [Qemu-devel] [PATCH v5 06/18] Respect length of watchpoints, Jan Kiszka, 2008/11/17
- [Qemu-devel] [PATCH v5 14/18] x86: Dump debug registers, Jan Kiszka, 2008/11/17
- [Qemu-devel] [PATCH v5 11/18] Add debug exception hook, Jan Kiszka, 2008/11/17
- [Qemu-devel] [PATCH v5 10/18] Introduce BP_WATCHPOINT_HIT flag, Jan Kiszka, 2008/11/17
- [Qemu-devel] [PATCH v5 18/18] gdbstub: x86: Switch 64/32 bit registers dynamically, Jan Kiszka, 2008/11/17