[Qemu-devel] hpet emulation problems

[Andriy Gapon]

I observe the following problems with qemu-emulated HPET:

1. setting lower 32bits of a 64-bit register clears the higher 32 bits;
At least this happens with TIMn_CONF register - I set some bits at offset 0x100
and all bits at 0x104 become cleared. The problem is aggravated by the fact that
those bits are supposed to be RO - they specify interrupt routing capabilities.

2. Setting interrupt type to level-triggered has no effect in the sense that
interrupt status bits are not set in GINTR_STA when interrupts are generated.

-- 
Andriy Gapon