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[Qemu-devel] [PATCH 14/14] pcibos/acpi dsdt: APIC mode support for q35 c
From: |
Isaku Yamahata |
Subject: |
[Qemu-devel] [PATCH 14/14] pcibos/acpi dsdt: APIC mode support for q35 chipset |
Date: |
Wed, 30 Sep 2009 19:18:49 +0900 |
APIC mode support for q35 chipset.
Currently gsi 16-19 are used.
Signed-off-by: Isaku Yamahata <address@hidden>
---
acpi-dsdt.dsl | 181 +++++++++++++++++++++++++++++++++++++++++----------------
1 files changed, 130 insertions(+), 51 deletions(-)
diff --git a/acpi-dsdt.dsl b/acpi-dsdt.dsl
index d75927b..19743bc 100644
--- a/acpi-dsdt.dsl
+++ b/acpi-dsdt.dsl
@@ -72,65 +72,142 @@ DefinitionBlock (
}
}
+ /* Zero => PIC mode, One => APIC Mode */
+ Name (\PICF, Zero)
+ Method (\_PIC, 1, NotSerialized)
+ {
+ Store (Arg0, \PICF)
+ }
+
/* PCI Bus definition */
Scope(\_SB) {
+
Device(PCI0) {
Name (_HID, EisaId ("PNP0A08"))
Name (_CID, EisaId ("PNP0A03"))
Name (_ADR, 0x00)
Name (_UID, 1)
- Name(_PRT, Package() {
+
+#define prt_slot_lnk(nr, lnk0, lnk1, lnk2, lnk3) \
+ Package() { nr##ffff, 0, lnk0, 0 }, \
+ Package() { nr##ffff, 1, lnk1, 0 }, \
+ Package() { nr##ffff, 2, lnk2, 0 }, \
+ Package() { nr##ffff, 3, lnk3, 0 }
+
+#define prt_slot_lnkD(nr) prt_slot_lnk(nr, LNKD, LNKA, LNKB, LNKC)
+#define prt_slot_lnkA(nr) prt_slot_lnk(nr, LNKA, LNKB, LNKC, LNKD)
+#define prt_slot_lnkB(nr) prt_slot_lnk(nr, LNKB, LNKC, LNKD, LNKA)
+#define prt_slot_lnkC(nr) prt_slot_lnk(nr, LNKC, LNKD, LNKA, LNKB)
+
+#define prt_slot_lnk_all(w, x, y, z) \
+ prt_slot_lnk##w(0x0000), \
+ prt_slot_lnk##x(0x0001), \
+ prt_slot_lnk##y(0x0002), \
+ prt_slot_lnk##z(0x0003), \
+ prt_slot_lnk##w(0x0004), \
+ prt_slot_lnk##x(0x0005), \
+ prt_slot_lnk##y(0x0006), \
+ prt_slot_lnk##z(0x0007), \
+ prt_slot_lnk##w(0x0008), \
+ prt_slot_lnk##x(0x0009), \
+ prt_slot_lnk##y(0x000a), \
+ prt_slot_lnk##z(0x000b), \
+ prt_slot_lnk##w(0x000c), \
+ prt_slot_lnk##x(0x000d), \
+ prt_slot_lnk##y(0x000e), \
+ prt_slot_lnk##z(0x000f), \
+ prt_slot_lnk##w(0x0010), \
+ prt_slot_lnk##x(0x0011), \
+ prt_slot_lnk##y(0x0012), \
+ prt_slot_lnk##z(0x0013), \
+ prt_slot_lnk##w(0x0014), \
+ prt_slot_lnk##x(0x0015), \
+ prt_slot_lnk##y(0x0016), \
+ prt_slot_lnk##z(0x0017), \
+ prt_slot_lnk##w(0x0018), \
+ prt_slot_lnk##x(0x0019), \
+ prt_slot_lnk##y(0x001a), \
+ prt_slot_lnk##z(0x001b), \
+ prt_slot_lnk##w(0x001c), \
+ prt_slot_lnk##x(0x001d), \
+ prt_slot_lnk##y(0x001e), \
+ prt_slot_lnk##z(0x001f), \
+
+#define prt_slot_gsi(nr, gsi0, gsi1, gsi2, gsi3) \
+ Package() { nr##ffff, 0, 0, gsi0 }, \
+ Package() { nr##ffff, 1, 0, gsi1 }, \
+ Package() { nr##ffff, 2, 0, gsi2 }, \
+ Package() { nr##ffff, 3, 0, gsi3 }
+
+#define GSIA 0x10
+#define GSIB 0x11
+#define GSIC 0x12
+#define GSID 0x13
+#define GSIE 0x14
+#define GSIF 0x15
+#define GSIG 0x16
+#define GSIH 0x17
+
+#define prt_slot_gsiD(nr) prt_slot_gsi(nr, GSID, GSIA, GSIB, GSIC)
+#define prt_slot_gsiA(nr) prt_slot_gsi(nr, GSIA, GSIB, GSIC, GSID)
+#define prt_slot_gsiB(nr) prt_slot_gsi(nr, GSIB, GSIC, GSID, GSIA)
+#define prt_slot_gsiC(nr) prt_slot_gsi(nr, GSIC, GSID, GSIA, GSIB)
+
+#define prt_slot_gsi_all(w, x, y, z) \
+ prt_slot_gsi##w(0x0000), \
+ prt_slot_gsi##x(0x0001), \
+ prt_slot_gsi##y(0x0002), \
+ prt_slot_gsi##z(0x0003), \
+ prt_slot_gsi##w(0x0004), \
+ prt_slot_gsi##x(0x0005), \
+ prt_slot_gsi##y(0x0006), \
+ prt_slot_gsi##z(0x0007), \
+ prt_slot_gsi##w(0x0008), \
+ prt_slot_gsi##x(0x0009), \
+ prt_slot_gsi##y(0x000a), \
+ prt_slot_gsi##z(0x000b), \
+ prt_slot_gsi##w(0x000c), \
+ prt_slot_gsi##x(0x000d), \
+ prt_slot_gsi##y(0x000e), \
+ prt_slot_gsi##z(0x000f), \
+ prt_slot_gsi##w(0x0010), \
+ prt_slot_gsi##x(0x0011), \
+ prt_slot_gsi##y(0x0012), \
+ prt_slot_gsi##z(0x0013), \
+ prt_slot_gsi##w(0x0014), \
+ prt_slot_gsi##x(0x0015), \
+ prt_slot_gsi##y(0x0016), \
+ prt_slot_gsi##z(0x0017), \
+ prt_slot_gsi##w(0x0018), \
+ prt_slot_gsi##x(0x0019), \
+ prt_slot_gsi##y(0x001a), \
+ prt_slot_gsi##z(0x001b), \
+ prt_slot_gsi##w(0x001c), \
+ prt_slot_gsi##x(0x001d), \
+ prt_slot_gsi##y(0x001e), \
+ prt_slot_gsi##z(0x001f), \
+
+#define prt_slots(w, x, y, z) \
+ If (LEqual (\PICF, Zero)) \
+ { \
+ Return (Package() { \
+ prt_slot_lnk_all(w, x, y, z) \
+ }) \
+ } \
+ Else \
+ { \
+ Return (Package() { \
+ prt_slot_gsi_all(w, x, y, z) \
+ }) \
+ }
+ Method(_PRT, 0, NotSerialized)
+ {
/* PCI IRQ routing table, example from ACPI 2.0a specification,
section 6.2.8.1 */
/* Note: we provide the same info as the PCI routing
table of the Bochs BIOS */
-#define prt_slot(nr, lnk0, lnk1, lnk2, lnk3) \
- Package() { nr##ffff, 0, lnk0, 0 }, \
- Package() { nr##ffff, 1, lnk1, 0 }, \
- Package() { nr##ffff, 2, lnk2, 0 }, \
- Package() { nr##ffff, 3, lnk3, 0 }
-
-#define prt_slotD(nr) prt_slot(nr, LNKD, LNKA, LNKB, LNKC)
-#define prt_slotA(nr) prt_slot(nr, LNKA, LNKB, LNKC, LNKD)
-#define prt_slotB(nr) prt_slot(nr, LNKB, LNKC, LNKD, LNKA)
-#define prt_slotC(nr) prt_slot(nr, LNKC, LNKD, LNKA, LNKB)
-
-#define prt_slots(w, x, y, z) \
- prt_slot##w(0x0000), \
- prt_slot##x(0x0001), \
- prt_slot##y(0x0002), \
- prt_slot##z(0x0003), \
- prt_slot##w(0x0004), \
- prt_slot##x(0x0005), \
- prt_slot##y(0x0006), \
- prt_slot##z(0x0007), \
- prt_slot##w(0x0008), \
- prt_slot##x(0x0009), \
- prt_slot##y(0x000a), \
- prt_slot##z(0x000b), \
- prt_slot##w(0x000c), \
- prt_slot##x(0x000d), \
- prt_slot##y(0x000e), \
- prt_slot##z(0x000f), \
- prt_slot##w(0x0010), \
- prt_slot##x(0x0011), \
- prt_slot##y(0x0012), \
- prt_slot##z(0x0013), \
- prt_slot##w(0x0014), \
- prt_slot##x(0x0015), \
- prt_slot##y(0x0016), \
- prt_slot##z(0x0017), \
- prt_slot##w(0x0018), \
- prt_slot##x(0x0019), \
- prt_slot##y(0x001a), \
- prt_slot##z(0x001b), \
- prt_slot##w(0x001c), \
- prt_slot##x(0x001d), \
- prt_slot##y(0x001e), \
- prt_slot##z(0x001f),
-
prt_slots(D, A, B, C)
- })
+ }
#define hotplug_slot(name, nr, bus) \
Device (S##name) { \
@@ -489,9 +566,10 @@ DefinitionBlock (
Device (PCI6) {
Name (_ADR, 0x1e0000) /* 0:1e.00 */
Name (_UID, 6)
- Name (_PRT, Package() {
+ Method(_PRT, 0, NotSerialized)
+ {
prt_slots(A, B, C, D)
- })
+ }
hotplug_slots(6)
}
}
@@ -501,9 +579,10 @@ DefinitionBlock (
Device (PCI##uid) { \
Name (_ADR, 0x##dev##0000) \
Name (_UID, uid) \
- Name (_PRT, Package() { \
+ Method(_PRT, 0, NotSerialized) \
+ { \
prt_slots(w, x, y, z) \
- }) \
+ } \
hotplug_slots(bus) \
} \
}
--
1.6.0.2
- [Qemu-devel] [PATCH 00/14] pcbios: support q35 chipset, Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 13/14] pcbios: change acpi dsdt for q35 chipset., Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 09/14] pcbios: comment out PCI_FIXED_HOST_BRIDGE for gmch host pci bridge to undef., Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 06/14] pcbios: rombios32: make pci space assigner preferchable memory aware., Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 02/14] pcbios: fix makesym.perl, Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 14/14] pcibos/acpi dsdt: APIC mode support for q35 chipset,
Isaku Yamahata <=
- [Qemu-devel] [PATCH 08/14] pcibos: initialize q35 chipset., Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 01/14] pcbios: add generated files to dot gitignore., Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 03/14] pcbios: remove iasl output file when error., Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 05/14] pcbios: rombios32: make pci memory space assignment 64bit aware., Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 12/14] pcbios: make pci bar initialization to be aware of preferchable memory., Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 07/14] pcbios: enable debug output for debug., Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 10/14] pcibos: add mcfg entry to ACPI table for q35 pcie., Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 04/14] pcbios: make set_e820_range() full 64bit aware., Isaku Yamahata, 2009/09/30
- [Qemu-devel] [PATCH 11/14] pcbios: reserve mcfg area by e820 for linux to use mcfg., Isaku Yamahata, 2009/09/30
- [Qemu-devel] Re: [PATCH 00/14] pcbios: support q35 chipset, Anthony Liguori, 2009/09/30