Re: [Qemu-devel] Re: POST failure (loop) with isapc and seabios

[Gleb Natapov]

On Mon, Nov 23, 2009 at 06:57:47PM +0100, Sebastian Herbszt wrote:
> Gleb Natapov wrote:
> >On Sun, Nov 22, 2009 at 10:38:42AM -0500, Kevin O'Connor wrote:
> >>On Sun, Nov 22, 2009 at 05:10:53PM +0200, Gleb Natapov wrote:
> >>> On Sun, Nov 22, 2009 at 04:07:56PM +0100, Sebastian Herbszt wrote:
> >>> > Gleb Natapov wrote:
> >>> > >May be make qemu to map it writable if isapc is specified.
> >>> > > > I don't think keeping the segment writable after POST is
> >>a good idea.
> >>> > > Isn't it writable now after POST with pcipc? Why this is
> >>not a good
> >>> idea?
> >>
> >>SeaBIOS and bochs bios will make the f-segment readonly at the end of
> >>post.  See make_bios_readonly() in src/shadow.c.
> >>
> >I see SeaBIOS does this, but I don't see where bochs bios does this.
> 
> bios_lock_shadow_ram() in rombio32.c.
> 
This functions is called far from end of the post and it doesn't change
mapping to be read only as far as I can see.

--
                        Gleb.