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[Qemu-devel] [PATCH 9/9] eepro100: Fix PCI interrupt pin configuration r


From: Stefan Weil
Subject: [Qemu-devel] [PATCH 9/9] eepro100: Fix PCI interrupt pin configuration regression
Date: Tue, 6 Apr 2010 13:44:09 +0200

Commit 15e89f5916c9e82347cbd1fd416db3e348bab426
removed this setting, but it is still needed.

Without this patch, e100 device drivers using
interrupts don't work with qemu.

See other nic emulations which also set the
PCI interrupt pin.

Signed-off-by: Stefan Weil <address@hidden>
---
 hw/eepro100.c |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/hw/eepro100.c b/hw/eepro100.c
index 2401888..bc7e3f1 100644
--- a/hw/eepro100.c
+++ b/hw/eepro100.c
@@ -475,6 +475,10 @@ static void e100_pci_reset(EEPRO100State * s, 
E100PCIDeviceInfo *e100_device)
     /* PCI Latency Timer */
     pci_set_byte(pci_conf + PCI_LATENCY_TIMER, 0x20);   /* latency timer = 32 
clocks */
     /* Capability Pointer is set by PCI framework. */
+    /* Interrupt Line */
+    /* Interrupt Pin */
+    /* TODO: RST# value should be 0. */
+    pci_set_byte(pci_conf + PCI_INTERRUPT_PIN, 1);      /* interrupt pin 0 */
     /* Minimum Grant */
     pci_set_byte(pci_conf + PCI_MIN_GNT, 0x08);
     /* Maximum Latency */
-- 
1.7.0





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