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Re: [Qemu-devel] Question about qemu firmware configuration (fw_cfg) dev


From: Anthony Liguori
Subject: Re: [Qemu-devel] Question about qemu firmware configuration (fw_cfg) device
Date: Mon, 19 Jul 2010 10:54:03 -0500
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On 07/19/2010 09:53 AM, Gleb Natapov wrote:
On Mon, Jul 19, 2010 at 09:45:58AM -0500, Anthony Liguori wrote:
On 07/19/2010 02:33 AM, Gleb Natapov wrote:
On Mon, Jul 19, 2010 at 08:28:02AM +0100, Richard W.M. Jones wrote:
On Mon, Jul 19, 2010 at 09:23:56AM +0300, Gleb Natapov wrote:
That what I am warring about too. If we are adding device we have to be
sure such device can actually exist on real hw too otherwise we may have
problems later.
I don't understand why the constraints of real h/w have anything to do
with this.  Can you explain?

Each time we do something not architectural it cause us troubles later.
So constraints of real h/w is our constrains to.
Your constraints are purely artificial.

What is artificial about it? Each time we break them we safer.

Just because something doesn't fit as an ISA or PCI device doesn't mean it can't exist in real life. There are plenty of one-off devices with odd interfaces.

There are plenty of places that something like fw_cfg could live and
still do DMA.  It can directly hang off of the Southbridge.  It
doesn't necessary need to be connected to the ISA/LPC buses.
Examples of real HW?

The IBM IMM, HP ILO, or Intel iAMT modules. They basically play an identical role to fw_cfg.

  And I am not against something that does DMA,
but that is not what proposed patch does. It provides magic io
instruction that CPU calls and when instruction completes memory is
updated. This is nothing like DMA.

Isn't this exactly what the interface for PCI DMA looks like since there's no standard DMA implementation?

  Of course it is possible to add
proper DMA interface to fw_cfg, but should we do it for such a small
gain?

I think an ad-hoc DMA interface is perfectly reasonable to do. I agree that adding a more generic DMA interface is overkill.

Regards,

Anthony Liguori

Buses exist to multiplex I/O devices because of limited wiring space
on motherboards.  There's no reason we need to constrain ourselves
to minimize the number of virtual wires we emulate.

Regards,

Anthony Liguori
--
                        Gleb.




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