[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 6/7] target-i386: Use deposit operation.
From: |
Edgar E. Iglesias |
Subject: |
Re: [Qemu-devel] [PATCH 6/7] target-i386: Use deposit operation. |
Date: |
Wed, 12 Jan 2011 12:01:33 +0100 |
User-agent: |
Mutt/1.5.20 (2009-06-14) |
On Mon, Jan 10, 2011 at 07:23:47PM -0800, Richard Henderson wrote:
> Use this for assignment to the low byte or low word of a register.
Looks good.
Acked-by: Edgar E. Iglesias <address@hidden>
>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> target-i386/translate.c | 34 ++++++----------------------------
> 1 files changed, 6 insertions(+), 28 deletions(-)
>
> diff --git a/target-i386/translate.c b/target-i386/translate.c
> index 7b6e3c2..c008450 100644
> --- a/target-i386/translate.c
> +++ b/target-i386/translate.c
> @@ -274,28 +274,16 @@ static inline void gen_op_andl_A0_ffff(void)
>
> static inline void gen_op_mov_reg_v(int ot, int reg, TCGv t0)
> {
> - TCGv tmp;
> -
> switch(ot) {
> case OT_BYTE:
> - tmp = tcg_temp_new();
> - tcg_gen_ext8u_tl(tmp, t0);
> if (reg < 4 X86_64_DEF( || reg >= 8 || x86_64_hregs)) {
> - tcg_gen_andi_tl(cpu_regs[reg], cpu_regs[reg], ~0xff);
> - tcg_gen_or_tl(cpu_regs[reg], cpu_regs[reg], tmp);
> + tcg_gen_deposit_tl(cpu_regs[reg], cpu_regs[reg], t0, 0, 8);
> } else {
> - tcg_gen_shli_tl(tmp, tmp, 8);
> - tcg_gen_andi_tl(cpu_regs[reg - 4], cpu_regs[reg - 4], ~0xff00);
> - tcg_gen_or_tl(cpu_regs[reg - 4], cpu_regs[reg - 4], tmp);
> + tcg_gen_deposit_tl(cpu_regs[reg - 4], cpu_regs[reg - 4], t0, 8,
> 8);
> }
> - tcg_temp_free(tmp);
> break;
> case OT_WORD:
> - tmp = tcg_temp_new();
> - tcg_gen_ext16u_tl(tmp, t0);
> - tcg_gen_andi_tl(cpu_regs[reg], cpu_regs[reg], ~0xffff);
> - tcg_gen_or_tl(cpu_regs[reg], cpu_regs[reg], tmp);
> - tcg_temp_free(tmp);
> + tcg_gen_deposit_tl(cpu_regs[reg], cpu_regs[reg], t0, 0, 16);
> break;
> default: /* XXX this shouldn't be reached; abort? */
> case OT_LONG:
> @@ -323,15 +311,9 @@ static inline void gen_op_mov_reg_T1(int ot, int reg)
>
> static inline void gen_op_mov_reg_A0(int size, int reg)
> {
> - TCGv tmp;
> -
> switch(size) {
> case 0:
> - tmp = tcg_temp_new();
> - tcg_gen_ext16u_tl(tmp, cpu_A0);
> - tcg_gen_andi_tl(cpu_regs[reg], cpu_regs[reg], ~0xffff);
> - tcg_gen_or_tl(cpu_regs[reg], cpu_regs[reg], tmp);
> - tcg_temp_free(tmp);
> + tcg_gen_deposit_tl(cpu_regs[reg], cpu_regs[reg], cpu_A0, 0, 16);
> break;
> default: /* XXX this shouldn't be reached; abort? */
> case 1:
> @@ -415,9 +397,7 @@ static inline void gen_op_add_reg_im(int size, int reg,
> int32_t val)
> switch(size) {
> case 0:
> tcg_gen_addi_tl(cpu_tmp0, cpu_regs[reg], val);
> - tcg_gen_ext16u_tl(cpu_tmp0, cpu_tmp0);
> - tcg_gen_andi_tl(cpu_regs[reg], cpu_regs[reg], ~0xffff);
> - tcg_gen_or_tl(cpu_regs[reg], cpu_regs[reg], cpu_tmp0);
> + tcg_gen_deposit_tl(cpu_regs[reg], cpu_regs[reg], cpu_tmp0, 0, 16);
> break;
> case 1:
> tcg_gen_addi_tl(cpu_tmp0, cpu_regs[reg], val);
> @@ -439,9 +419,7 @@ static inline void gen_op_add_reg_T0(int size, int reg)
> switch(size) {
> case 0:
> tcg_gen_add_tl(cpu_tmp0, cpu_regs[reg], cpu_T[0]);
> - tcg_gen_ext16u_tl(cpu_tmp0, cpu_tmp0);
> - tcg_gen_andi_tl(cpu_regs[reg], cpu_regs[reg], ~0xffff);
> - tcg_gen_or_tl(cpu_regs[reg], cpu_regs[reg], cpu_tmp0);
> + tcg_gen_deposit_tl(cpu_regs[reg], cpu_regs[reg], cpu_tmp0, 0, 16);
> break;
> case 1:
> tcg_gen_add_tl(cpu_tmp0, cpu_regs[reg], cpu_T[0]);
> --
> 1.7.2.3
>
>
- [Qemu-devel] [PATCH 0/7] Define "deposit" tcg operation, v2, Richard Henderson, 2011/01/10
- [Qemu-devel] [PATCH 7/7] target-ppc: Use deposit operation., Richard Henderson, 2011/01/10
- [Qemu-devel] [PATCH 6/7] target-i386: Use deposit operation., Richard Henderson, 2011/01/10
- [Qemu-devel] [PATCH 1/7] tcg: Define "deposit" as an optional operation., Richard Henderson, 2011/01/10
- [Qemu-devel] [PATCH 3/7] tcg-hppa: Implement deposit operation., Richard Henderson, 2011/01/10
- [Qemu-devel] [PATCH 4/7] tcg-ia64: Implement deposit operation., Richard Henderson, 2011/01/10
- [Qemu-devel] [PATCH 5/7] tcg-i386: Implement deposit operation., Richard Henderson, 2011/01/10