qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH 15/15] tcg: use ext op for deposit


From: Alexander Graf
Subject: Re: [Qemu-devel] [PATCH 15/15] tcg: use ext op for deposit
Date: Tue, 5 Apr 2011 09:55:09 +0200

On 05.04.2011, at 06:54, Aurelien Jarno wrote:

> On Mon, Apr 04, 2011 at 04:32:24PM +0200, Alexander Graf wrote:
>> With the s390x target we use the deposit instruction to store 32bit values
>> into 64bit registers without clobbering the upper 32 bits.
>> 
>> This specific operation can be optimized slightly by using the ext operation
>> instead of an explicit and in the deposit instruction. This patch adds that
>> special case to the generic deposit implementation.
>> 
>> Signed-off-by: Alexander Graf <address@hidden>
>> ---
>> tcg/tcg-op.h |    6 +++++-
>> 1 files changed, 5 insertions(+), 1 deletions(-)
> 
> Have you really measuring a difference here? This should already be
> handled, at least on x86, by this code:
> 
>        if (TCG_TARGET_REG_BITS == 64) {
>            if (val == 0xffffffffu) {
>                tcg_out_ext32u(s, r0, r0);
>                return;
>            }
>            if (val == (uint32_t)val) {
>                /* AND with no high bits set can use a 32-bit operation.  */
>                rexw = 0;
>            }
>        }

I've certainly looked at the -d op logs and seen that instead of creating a 
const tcg variable plus an AND there was now an extu opcode issued, yes. No 
idea why the case up there didn't trigger.


Alex




reply via email to

[Prev in Thread] Current Thread [Next in Thread]