Re: [Qemu-devel] [PATCH] ppc64: fix mtmsr behavior on 64-bit targets

[Nathan Whitehorn]

On 05/31/11 12:40, Richard Henderson wrote:
> On 05/31/2011 07:56 AM, Nathan Whitehorn wrote:
> >   #if defined(TARGET_PPC64)
> > -        if (!ctx->sf_mode) {
> >               TCGv t0 = tcg_temp_new();
> >               TCGv t1 = tcg_temp_new();
> You're removing a scope in which these variables were defined.
> That seems wrong, at minimum.

I'll fix that (and resend the patch), thanks. A note on this: it looks 
like a lot of code here incorrectly changes behavior depending on the 
setting of MSR[SF]. While most of them aren't checking the condition the 
wrong way, like here, MSR[SF] actually changes very few aspects of the 
processor's operation. Turning MSR[SF] on or off on a 64-bit CPU 
basically only affects whether it pays attention to the high 32-bits of 
addresses when doing loads, stores, and branches -- 64-bit arithmetic, 
comparisons, registers, etc. are all available whatever the setting of 
MSR[SF].
-Nathan