[Qemu-devel] [PATCH 8/8] added mmu tc, sfc, dfc, and access control registers to the cpu header

[Bryce Lanham]

Signed-off-by: Bryce Lanham <address@hidden>
---
 target-m68k/cpu.h |   12 +++++++++---
 1 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h
index 2587512..006ecdc 100644
--- a/target-m68k/cpu.h
+++ b/target-m68k/cpu.h
@@ -99,13 +99,17 @@ typedef struct CPUM68KState {
     /* SSP and USP.  The current_sp is stored in aregs[7], the other here.  */
     int current_sp;
     uint32_t sp[2];
-
     /* Condition flags.  */
     uint32_t cc_op;
     uint32_t cc_dest;
     uint32_t cc_src;
     uint32_t cc_x;
-
+       /* Control Registers */
+       uint32_t sfc;
+       uint32_t dfc;
+       uint32_t itt0,itt1;
+       uint32_t dtt0,dtt1;
+       /* FPU Registers */
     FPReg fregs[8];
     uint32_t fpcr;
     uint32_t fpsr;
@@ -136,7 +140,8 @@ typedef struct CPUM68KState {
     /* MMU status.  */
     struct {
         uint32_t ar;
-    } mmu;
+       uint32_t tc;
+       } mmu;
 
     /* Control registers.  */
     uint32_t vbr;
@@ -314,4 +319,5 @@ static inline void cpu_pc_from_tb(CPUState *env, 
TranslationBlock *tb)
     env->pc = tb->pc;
 }
 
+
 #endif
-- 
1.7.2.3