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[Qemu-devel] [PATCH v3 08/32] target-xtensa: implement JX/RET0/CALLX
From: |
Max Filippov |
Subject: |
[Qemu-devel] [PATCH v3 08/32] target-xtensa: implement JX/RET0/CALLX |
Date: |
Thu, 1 Sep 2011 01:56:59 +0400 |
Group SNM0 (indirect jumps and calls).
Signed-off-by: Max Filippov <address@hidden>
---
target-xtensa/translate.c | 43 +++++++++++++++++++++++++++++++++++++++++++
1 files changed, 43 insertions(+), 0 deletions(-)
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index c6ebb3d..400c995 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -248,6 +248,49 @@ static void disas_xtensa_insn(DisasContext *dc)
switch (RRR_R) {
case 0: /*SNM0*/
+ switch (CALLX_M) {
+ case 0: /*ILL*/
+ break;
+
+ case 1: /*reserved*/
+ break;
+
+ case 2: /*JR*/
+ switch (CALLX_N) {
+ case 0: /*RET*/
+ case 2: /*JX*/
+ gen_jump(dc, cpu_R[CALLX_S]);
+ break;
+
+ case 1: /*RETWw*/
+ HAS_OPTION(XTENSA_OPTION_WINDOWED_REGISTER);
+ break;
+
+ case 3: /*reserved*/
+ break;
+ }
+ break;
+
+ case 3: /*CALLX*/
+ switch (CALLX_N) {
+ case 0: /*CALLX0*/
+ {
+ TCGv_i32 tmp = tcg_temp_new_i32();
+ tcg_gen_mov_i32(tmp, cpu_R[CALLX_S]);
+ tcg_gen_movi_i32(cpu_R[0], dc->next_pc);
+ gen_jump(dc, tmp);
+ tcg_temp_free(tmp);
+ }
+ break;
+
+ case 1: /*CALLX4w*/
+ case 2: /*CALLX8w*/
+ case 3: /*CALLX12w*/
+ HAS_OPTION(XTENSA_OPTION_WINDOWED_REGISTER);
+ break;
+ }
+ break;
+ }
break;
case 1: /*MOVSPw*/
--
1.7.6
- [Qemu-devel] [PATCH v3 00/32] target-xtensa: new target architecture, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 31/32] MAINTAINERS: add xtensa maintainer, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 05/32] target-xtensa: implement RT0 group, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 14/32] target-xtensa: implement SYNC group, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 08/32] target-xtensa: implement JX/RET0/CALLX,
Max Filippov <=
- [Qemu-devel] [PATCH v3 02/32] target-xtensa: add target to the configure script, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 26/32] target-xtensa: implement CPENABLE and PRID SRs, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 04/32] target-xtensa: implement narrow instructions, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 15/32] target-xtensa: implement CACHE group, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 09/32] target-xtensa: add special and user registers, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 16/32] target-xtensa: add PS register and access control, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 06/32] target-xtensa: add sample board, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 18/32] target-xtensa: implement RST2 group (32 bit mul/div/rem), Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 21/32] target-xtensa: implement extended L32R, Max Filippov, 2011/08/31
- [Qemu-devel] [PATCH v3 12/32] target-xtensa: implement LSAI group, Max Filippov, 2011/08/31