[Qemu-devel] [PATCH 09/14] softfloat: Replace int8 type with int_fast8_t

[Andreas Färber]

Based on the following Coccinelle patch:

@@
typedef int8, int_fast8_t;
@@
-int8
+int_fast8_t

Add typedef for pre-10 Solaris.

Signed-off-by: Andreas Färber <address@hidden>
Cc: Ben Taylor <address@hidden>
---
 fpu/softfloat-macros.h     |   26 +++++++++---------
 fpu/softfloat-specialize.h |    2 +-
 fpu/softfloat.c            |   62 ++++++++++++++++++++++----------------------
 fpu/softfloat.h            |    3 +-
 osdep.h                    |    1 +
 5 files changed, 47 insertions(+), 47 deletions(-)

diff --git a/fpu/softfloat-macros.h b/fpu/softfloat-macros.h
index b5164af..b82871a 100644
--- a/fpu/softfloat-macros.h
+++ b/fpu/softfloat-macros.h
@@ -120,7 +120,7 @@ INLINE void
      uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t 
*z1Ptr)
 {
     uint64_t z0, z1;
-    int8 negCount = ( - count ) & 63;
+    int_fast8_t negCount = (-count) & 63;
 
     if ( count == 0 ) {
         z1 = a1;
@@ -157,7 +157,7 @@ INLINE void
      uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t 
*z1Ptr)
 {
     uint64_t z0, z1;
-    int8 negCount = ( - count ) & 63;
+    int_fast8_t negCount = (-count) & 63;
 
     if ( count == 0 ) {
         z1 = a1;
@@ -192,7 +192,7 @@ INLINE void
      uint64_t a0, uint64_t a1, int_fast16_t count, uint64_t *z0Ptr, uint64_t 
*z1Ptr)
 {
     uint64_t z0, z1;
-    int8 negCount = ( - count ) & 63;
+    int_fast8_t negCount = (-count) & 63;
 
     if ( count == 0 ) {
         z1 = a1;
@@ -250,7 +250,7 @@ INLINE void
  )
 {
     uint64_t z0, z1, z2;
-    int8 negCount = ( - count ) & 63;
+    int_fast8_t negCount = (-count) & 63;
 
     if ( count == 0 ) {
         z2 = a2;
@@ -327,7 +327,7 @@ INLINE void
  )
 {
     uint64_t z0, z1, z2;
-    int8 negCount;
+    int_fast8_t negCount;
 
     z2 = a2<<count;
     z1 = a1<<count;
@@ -384,7 +384,7 @@ INLINE void
  )
 {
     uint64_t z0, z1, z2;
-    int8 carry0, carry1;
+    int_fast8_t carry0, carry1;
 
     z2 = a2 + b2;
     carry1 = ( z2 < a2 );
@@ -440,7 +440,7 @@ INLINE void
  )
 {
     uint64_t z0, z1, z2;
-    int8 borrow0, borrow1;
+    int_fast8_t borrow0, borrow1;
 
     z2 = a2 - b2;
     borrow1 = ( a2 < b2 );
@@ -601,7 +601,7 @@ static uint32_t estimateSqrt32(int_fast16_t aExp, uint32_t 
a)
         0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E,
         0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002
     };
-    int8 index;
+    int_fast8_t index;
     uint32_t z;
 
     index = ( a>>27 ) & 15;
@@ -625,7 +625,7 @@ static uint32_t estimateSqrt32(int_fast16_t aExp, uint32_t 
a)
 | `a'.  If `a' is zero, 32 is returned.
 *----------------------------------------------------------------------------*/
 
-static int8 countLeadingZeros32( uint32_t a )
+static int_fast8_t countLeadingZeros32(uint32_t a)
 {
 #if SOFTFLOAT_GNUC_PREREQ(3, 4)
     if (a) {
@@ -634,7 +634,7 @@ static int8 countLeadingZeros32( uint32_t a )
         return 32;
     }
 #else
-    static const int8 countLeadingZerosHigh[] = {
+    static const int_fast8_t countLeadingZerosHigh[] = {
         8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,
         3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
         2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
@@ -652,7 +652,7 @@ static int8 countLeadingZeros32( uint32_t a )
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
     };
-    int8 shiftCount;
+    int_fast8_t shiftCount;
 
     shiftCount = 0;
     if ( a < 0x10000 ) {
@@ -673,7 +673,7 @@ static int8 countLeadingZeros32( uint32_t a )
 | `a'.  If `a' is zero, 64 is returned.
 *----------------------------------------------------------------------------*/
 
-static int8 countLeadingZeros64( uint64_t a )
+static int_fast8_t countLeadingZeros64(uint64_t a)
 {
 #if SOFTFLOAT_GNUC_PREREQ(3, 4)
     if (a) {
@@ -682,7 +682,7 @@ static int8 countLeadingZeros64( uint64_t a )
         return 64;
     }
 #else
-    int8 shiftCount;
+    int_fast8_t shiftCount;
 
     shiftCount = 0;
     if ( a < ( (uint64_t) 1 )<<32 ) {
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index c5e2dab..d57af1a 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -114,7 +114,7 @@ const float128 float128_default_nan = 
make_float128(float128_default_nan_high,
 | should be simply `float_exception_flags |= flags;'.
 *----------------------------------------------------------------------------*/
 
-void float_raise( int8 flags STATUS_PARAM )
+void float_raise(int_fast8_t flags STATUS_PARAM)
 {
     STATUS(float_exception_flags) |= flags;
 }
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index a406a35..b5fa3ef 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -114,9 +114,9 @@ INLINE flag extractFloat16Sign(float16 a)
 
 static int32 roundAndPackInt32( flag zSign, uint64_t absZ STATUS_PARAM)
 {
-    int8 roundingMode;
+    int_fast8_t roundingMode;
     flag roundNearestEven;
-    int8 roundIncrement, roundBits;
+    int_fast8_t roundIncrement, roundBits;
     int32 z;
 
     roundingMode = STATUS(float_rounding_mode);
@@ -164,7 +164,7 @@ static int32 roundAndPackInt32( flag zSign, uint64_t absZ 
STATUS_PARAM)
 
 static int64 roundAndPackInt64( flag zSign, uint64_t absZ0, uint64_t absZ1 
STATUS_PARAM)
 {
-    int8 roundingMode;
+    int_fast8_t roundingMode;
     flag roundNearestEven, increment;
     int64 z;
 
@@ -261,7 +261,7 @@ static float32 float32_squash_input_denormal(float32 a 
STATUS_PARAM)
 static void
  normalizeFloat32Subnormal(uint32_t aSig, int_fast16_t *zExpPtr, uint32_t 
*zSigPtr)
 {
-    int8 shiftCount;
+    int_fast8_t shiftCount;
 
     shiftCount = countLeadingZeros32( aSig ) - 8;
     *zSigPtr = aSig<<shiftCount;
@@ -312,9 +312,9 @@ INLINE float32 packFloat32(flag zSign, int_fast16_t zExp, 
uint32_t zSig)
 
 static float32 roundAndPackFloat32(flag zSign, int_fast16_t zExp, uint32_t 
zSig STATUS_PARAM)
 {
-    int8 roundingMode;
+    int_fast8_t roundingMode;
     flag roundNearestEven;
-    int8 roundIncrement, roundBits;
+    int_fast8_t roundIncrement, roundBits;
     flag isTiny;
 
     roundingMode = STATUS(float_rounding_mode);
@@ -378,7 +378,7 @@ static float32 roundAndPackFloat32(flag zSign, int_fast16_t 
zExp, uint32_t zSig
 static float32
  normalizeRoundAndPackFloat32(flag zSign, int_fast16_t zExp, uint32_t zSig 
STATUS_PARAM)
 {
-    int8 shiftCount;
+    int_fast8_t shiftCount;
 
     shiftCount = countLeadingZeros32( zSig ) - 1;
     return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount 
STATUS_VAR);
@@ -443,7 +443,7 @@ static float64 float64_squash_input_denormal(float64 a 
STATUS_PARAM)
 static void
  normalizeFloat64Subnormal(uint64_t aSig, int_fast16_t *zExpPtr, uint64_t 
*zSigPtr)
 {
-    int8 shiftCount;
+    int_fast8_t shiftCount;
 
     shiftCount = countLeadingZeros64( aSig ) - 11;
     *zSigPtr = aSig<<shiftCount;
@@ -494,7 +494,7 @@ INLINE float64 packFloat64(flag zSign, int_fast16_t zExp, 
uint64_t zSig)
 
 static float64 roundAndPackFloat64(flag zSign, int_fast16_t zExp, uint64_t 
zSig STATUS_PARAM)
 {
-    int8 roundingMode;
+    int_fast8_t roundingMode;
     flag roundNearestEven;
     int_fast16_t roundIncrement, roundBits;
     flag isTiny;
@@ -560,7 +560,7 @@ static float64 roundAndPackFloat64(flag zSign, int_fast16_t 
zExp, uint64_t zSig
 static float64
  normalizeRoundAndPackFloat64(flag zSign, int_fast16_t zExp, uint64_t zSig 
STATUS_PARAM)
 {
-    int8 shiftCount;
+    int_fast8_t shiftCount;
 
     shiftCount = countLeadingZeros64( zSig ) - 1;
     return roundAndPackFloat64( zSign, zExp - shiftCount, zSig<<shiftCount 
STATUS_VAR);
@@ -613,7 +613,7 @@ INLINE flag extractFloatx80Sign( floatx80 a )
 static void
  normalizeFloatx80Subnormal( uint64_t aSig, int32 *zExpPtr, uint64_t *zSigPtr )
 {
-    int8 shiftCount;
+    int_fast8_t shiftCount;
 
     shiftCount = countLeadingZeros64( aSig );
     *zSigPtr = aSig<<shiftCount;
@@ -662,10 +662,10 @@ INLINE floatx80 packFloatx80( flag zSign, int32 zExp, 
uint64_t zSig )
 
 static floatx80
  roundAndPackFloatx80(
-     int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t 
zSig1
+     int_fast8_t roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, 
uint64_t zSig1
  STATUS_PARAM)
 {
-    int8 roundingMode;
+    int_fast8_t roundingMode;
     flag roundNearestEven, increment, isTiny;
     int64 roundIncrement, roundMask, roundBits;
 
@@ -834,10 +834,10 @@ static floatx80
 
 static floatx80
  normalizeRoundAndPackFloatx80(
-     int8 roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, uint64_t 
zSig1
+     int_fast8_t roundingPrecision, flag zSign, int32 zExp, uint64_t zSig0, 
uint64_t zSig1
  STATUS_PARAM)
 {
-    int8 shiftCount;
+    int_fast8_t shiftCount;
 
     if ( zSig0 == 0 ) {
         zSig0 = zSig1;
@@ -918,7 +918,7 @@ static void
      uint64_t *zSig1Ptr
  )
 {
-    int8 shiftCount;
+    int_fast8_t shiftCount;
 
     if ( aSig0 == 0 ) {
         shiftCount = countLeadingZeros64( aSig1 ) - 15;
@@ -989,7 +989,7 @@ static float128
  roundAndPackFloat128(
      flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1, uint64_t zSig2 
STATUS_PARAM)
 {
-    int8 roundingMode;
+    int_fast8_t roundingMode;
     flag roundNearestEven, increment, isTiny;
 
     roundingMode = STATUS(float_rounding_mode);
@@ -1093,7 +1093,7 @@ static float128
  normalizeRoundAndPackFloat128(
      flag zSign, int32 zExp, uint64_t zSig0, uint64_t zSig1 STATUS_PARAM)
 {
-    int8 shiftCount;
+    int_fast8_t shiftCount;
     uint64_t zSig2;
 
     if ( zSig0 == 0 ) {
@@ -1142,7 +1142,7 @@ float64 int32_to_float64( int32 a STATUS_PARAM )
 {
     flag zSign;
     uint32 absA;
-    int8 shiftCount;
+    int_fast8_t shiftCount;
     uint64_t zSig;
 
     if ( a == 0 ) return float64_zero;
@@ -1165,7 +1165,7 @@ floatx80 int32_to_floatx80( int32 a STATUS_PARAM )
 {
     flag zSign;
     uint32 absA;
-    int8 shiftCount;
+    int_fast8_t shiftCount;
     uint64_t zSig;
 
     if ( a == 0 ) return packFloatx80( 0, 0, 0 );
@@ -1187,7 +1187,7 @@ float128 int32_to_float128( int32 a STATUS_PARAM )
 {
     flag zSign;
     uint32 absA;
-    int8 shiftCount;
+    int_fast8_t shiftCount;
     uint64_t zSig0;
 
     if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
@@ -1209,7 +1209,7 @@ float32 int64_to_float32( int64 a STATUS_PARAM )
 {
     flag zSign;
     uint64 absA;
-    int8 shiftCount;
+    int_fast8_t shiftCount;
 
     if ( a == 0 ) return float32_zero;
     zSign = ( a < 0 );
@@ -1233,7 +1233,7 @@ float32 int64_to_float32( int64 a STATUS_PARAM )
 
 float32 uint64_to_float32( uint64 a STATUS_PARAM )
 {
-    int8 shiftCount;
+    int_fast8_t shiftCount;
 
     if ( a == 0 ) return float32_zero;
     shiftCount = countLeadingZeros64( a ) - 40;
@@ -1289,7 +1289,7 @@ floatx80 int64_to_floatx80( int64 a STATUS_PARAM )
 {
     flag zSign;
     uint64 absA;
-    int8 shiftCount;
+    int_fast8_t shiftCount;
 
     if ( a == 0 ) return packFloatx80( 0, 0, 0 );
     zSign = ( a < 0 );
@@ -1309,7 +1309,7 @@ float128 int64_to_float128( int64 a STATUS_PARAM )
 {
     flag zSign;
     uint64 absA;
-    int8 shiftCount;
+    int_fast8_t shiftCount;
     int32 zExp;
     uint64_t zSig0, zSig1;
 
@@ -1641,7 +1641,7 @@ float32 float32_round_to_int( float32 a STATUS_PARAM)
     flag aSign;
     int_fast16_t aExp;
     uint32_t lastBitMask, roundBitsMask;
-    int8 roundingMode;
+    int_fast8_t roundingMode;
     uint32_t z;
     a = float32_squash_input_denormal(a STATUS_VAR);
 
@@ -3010,7 +3010,7 @@ float32 float16_to_float32(float16 a, flag ieee 
STATUS_PARAM)
         return packFloat32(aSign, 0xff, aSig << 13);
     }
     if (aExp == 0) {
-        int8 shiftCount;
+        int_fast8_t shiftCount;
 
         if (aSig == 0) {
             return packFloat32(aSign, 0, 0);
@@ -3030,7 +3030,7 @@ float16 float32_to_float16(float32 a, flag ieee 
STATUS_PARAM)
     uint32_t aSig;
     uint32_t mask;
     uint32_t increment;
-    int8 roundingMode;
+    int_fast8_t roundingMode;
     a = float32_squash_input_denormal(a STATUS_VAR);
 
     aSig = extractFloat32Frac( a );
@@ -3191,7 +3191,7 @@ float64 float64_round_to_int( float64 a STATUS_PARAM )
     flag aSign;
     int_fast16_t aExp;
     uint64_t lastBitMask, roundBitsMask;
-    int8 roundingMode;
+    int_fast8_t roundingMode;
     uint64_t z;
     a = float64_squash_input_denormal(a STATUS_VAR);
 
@@ -4454,7 +4454,7 @@ floatx80 floatx80_round_to_int( floatx80 a STATUS_PARAM )
     flag aSign;
     int32 aExp;
     uint64_t lastBitMask, roundBitsMask;
-    int8 roundingMode;
+    int_fast8_t roundingMode;
     floatx80 z;
 
     aExp = extractFloatx80Exp( a );
@@ -5529,7 +5529,7 @@ float128 float128_round_to_int( float128 a STATUS_PARAM )
     flag aSign;
     int32 aExp;
     uint64_t lastBitMask, roundBitsMask;
-    int8 roundingMode;
+    int_fast8_t roundingMode;
     float128 z;
 
     aExp = extractFloat128Exp( a );
diff --git a/fpu/softfloat.h b/fpu/softfloat.h
index 99ff44e..ea18a66 100644
--- a/fpu/softfloat.h
+++ b/fpu/softfloat.h
@@ -55,7 +55,6 @@ these four paragraphs for those parts of this code that are 
retained.
 | to the same as `int'.
 *----------------------------------------------------------------------------*/
 typedef uint8_t flag;
-typedef int8_t int8;
 typedef unsigned int uint32;
 typedef signed int int32;
 typedef uint64_t uint64;
@@ -205,7 +204,7 @@ void set_floatx80_rounding_precision(int val STATUS_PARAM);
 | Routine to raise any or all of the software IEC/IEEE floating-point
 | exception flags.
 *----------------------------------------------------------------------------*/
-void float_raise( int8 flags STATUS_PARAM);
+void float_raise(int_fast8_t flags STATUS_PARAM);
 
 /*----------------------------------------------------------------------------
 | Options to indicate which negations to perform in float*_muladd()
diff --git a/osdep.h b/osdep.h
index 0e560aa..b87b450 100644
--- a/osdep.h
+++ b/osdep.h
@@ -14,6 +14,7 @@
 /* uint_fast8_t and uint_fast16_t not in <sys/int_types.h> */
 typedef unsigned char           uint_fast8_t;
 typedef unsigned int            uint_fast16_t;
+typedef signed char             int_fast8_t;
 typedef signed int              int_fast16_t;
 #endif
 
-- 
1.7.7