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Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank
From: |
Mark Langsdorf |
Subject: |
Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank |
Date: |
Thu, 19 Jan 2012 14:48:38 -0600 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:8.0) Gecko/20111124 Thunderbird/8.0 |
On 01/19/2012 01:59 PM, Peter Maydell wrote:
> On 19 January 2012 19:58, Mark Langsdorf <address@hidden> wrote:
>> On 01/19/2012 01:44 PM, Peter Maydell wrote:
>>> I have a kernel now that seems to boot but then
>>> barfs with:
>>> Freeing init memory: 124K
>>> Kernel panic - not syncing: Attempted to kill init!
>>>
>>> but that's probably a misconfiguration in my kernel.
>>
>> You need to be passing -m 4089.
>
> cam-vm-266:maverick:qemu-jeos$
> ~/linaro/qemu-from-laptop/qemu/arm-softmmu/qemu-system-arm -kernel
> zImage-with-dtb -initrd build-arm/initramfs.img -M highbank -serial
> stdio -m 4089
> qemu: at most 2047 MB RAM can be simulated
>
> I'd rather not have a model that doesn't work on 32 bit hosts
> if we can avoid it...
The memory size is determined by the dts:
http://lxr.linux.no/#linux+v3.2.1/arch/arm/boot/dts/highbank.dts#L60
So you should be able to set it to whatever you want as long as the
values match. I've tested a boot with -m 2047 and the memory range
going from 0 to 0x7ff00000. That required regenerating the dtb and
re-appending it to the kernel image, though. I don't know of an
easy to handle that on the command line.
Is that sufficient for me to resend the patch with the changes
covered below?
>> + highbank_binfo.board_id = -1; /* provided by deviceTree */
>
> I'm still not sure about this.
>
> The linux Documentation/devicetree/booting-without-of.txt says
> there are two calling conventions for booting here, ATAGS and
> with-device-tree-blob, and that even with the device tree blob
> method it is still considered "good practise" to pass a valid
> machine number in r1. Can you point me to some documentation
> that says that -1 is OK now?
I can't, so I'll change the value. We only intend to support
device tree booting.
--Mark Langsdorf
Calxeda, Inc.
- [Qemu-devel] [PATCH v11 6/6] arm: Remove incorrect comment in arm_timer, (continued)
- [Qemu-devel] [PATCH v11 6/6] arm: Remove incorrect comment in arm_timer, Mark Langsdorf, 2012/01/19
- [Qemu-devel] [PATCH v11 2/6] arm: make the number of GIC interrupts configurable, Mark Langsdorf, 2012/01/19
- [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/19
- Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/19
- Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/19
- Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/19
- Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/19
- Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/19
- Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank, Mark Langsdorf, 2012/01/19
- Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/19
- Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank,
Mark Langsdorf <=
- Re: [Qemu-devel] [PATCH v11 5/6] arm: SoC model for Calxeda Highbank, Peter Maydell, 2012/01/19
- [Qemu-devel] [PATCH v11 3/6] ahci: add support for non-PCI based controllers, Mark Langsdorf, 2012/01/19
- [Qemu-devel] [PATCH v11 1/6] Add xgmac ethernet model, Mark Langsdorf, 2012/01/19
- [Qemu-devel] [PATCH v11 4/6] arm: add secondary cpu book callbacks to arm_boot.c, Mark Langsdorf, 2012/01/19
- Re: [Qemu-devel] [PATCH v11 4/6] arm: add secondary cpu book callbacks to arm_boot.c, Peter Maydell, 2012/01/19
[Qemu-devel] [PATCH v12 0/5] arm: add support for Calxeda Highbank, Mark Langsdorf, 2012/01/19