[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v2 26/27] omap_clk: convert to QOM
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v2 26/27] omap_clk: convert to QOM |
Date: |
Mon, 6 Feb 2012 16:32:39 +0000 |
cc'ing Andrzej who also has some interest in the omap platforms.
-- PMM
On 4 February 2012 08:02, Paolo Bonzini <address@hidden> wrote:
> Make the OMAP clocks QOM objects, so that they we can put them in a branch
> of the object graph and turn the pointer properties into links.
>
> As in the current code, the clocks are copied into a freshly allocated
> memory block when they are initialized. However, the "templates" now
> have a separate struct definition because the header must be created
> anyway with object_initialize. The linking of children to parents
> is moved to a separate loop for simplicity.
>
> Cc: Peter Maydell <address@hidden>
> Signed-off-by: Paolo Bonzini <address@hidden>
> ---
> hw/omap.h | 4 +
> hw/omap1.c | 6 +-
> hw/omap2.c | 16 ++--
> hw/omap_clk.c | 357 ++++++++++++++++++++++++++++++++------------------------
> 4 files changed, 219 insertions(+), 164 deletions(-)
>
> diff --git a/hw/omap.h b/hw/omap.h
> index 60fa34c..5c0f95a 100644
> --- a/hw/omap.h
> +++ b/hw/omap.h
> @@ -49,6 +49,8 @@
> # define OMAP_CS3_SIZE 0x04000000
>
> /* omap_clk.c */
> +#define TYPE_OMAP_CLK "omap-clk"
> +
> struct omap_mpu_state_s;
> typedef struct clk *omap_clk;
> omap_clk omap_findclk(struct omap_mpu_state_s *mpu, const char *name);
> @@ -61,6 +63,8 @@ void omap_clk_canidle(omap_clk clk, int can);
> void omap_clk_setrate(omap_clk clk, int divide, int multiply);
> int64_t omap_clk_getrate(omap_clk clk);
> void omap_clk_reparent(omap_clk clk, omap_clk parent);
> +void omap_prop_set_clk(struct omap_mpu_state_s *s, DeviceState *dev,
> + const char *name, const char *clk);
>
> /* OMAP2 l4 Interconnect */
> struct omap_l4_s;
> diff --git a/hw/omap1.c b/hw/omap1.c
> index 1aa5f23..12f1197 100644
> --- a/hw/omap1.c
> +++ b/hw/omap1.c
> @@ -3856,7 +3856,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion
> *system_memory,
> cpu_irq = arm_pic_init_cpu(s->env);
> s->ih[0] = qdev_create(NULL, "omap-intc");
> qdev_prop_set_uint32(s->ih[0], "size", 0x100);
> - qdev_prop_set_ptr(s->ih[0], "clk", omap_findclk(s, "arminth_ck"));
> + omap_prop_set_clk(s, s->ih[0], "clk", "arminth_ck");
> qdev_init_nofail(s->ih[0]);
> busdev = sysbus_from_qdev(s->ih[0]);
> sysbus_connect_irq(busdev, 0, cpu_irq[ARM_PIC_CPU_IRQ]);
> @@ -3864,7 +3864,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion
> *system_memory,
> sysbus_mmio_map(busdev, 0, 0xfffecb00);
> s->ih[1] = qdev_create(NULL, "omap-intc");
> qdev_prop_set_uint32(s->ih[1], "size", 0x800);
> - qdev_prop_set_ptr(s->ih[1], "clk", omap_findclk(s, "arminth_ck"));
> + omap_prop_set_clk(s, s->ih[1], "clk", "arminth_ck");
> qdev_init_nofail(s->ih[1]);
> busdev = sysbus_from_qdev(s->ih[1]);
> sysbus_connect_irq(busdev, 0,
> @@ -3977,7 +3977,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion
> *system_memory,
>
> s->gpio = qdev_create(NULL, "omap-gpio");
> qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model);
> - qdev_prop_set_ptr(s->gpio, "clk", omap_findclk(s, "arm_gpio_ck"));
> + omap_prop_set_clk(s, s->gpio, "clk", "arm_gpio_ck");
> qdev_init_nofail(s->gpio);
> sysbus_connect_irq(sysbus_from_qdev(s->gpio), 0,
> qdev_get_gpio_in(s->ih[0], OMAP_INT_GPIO_BANK1));
> diff --git a/hw/omap2.c b/hw/omap2.c
> index a6851b0..b1fe0d3 100644
> --- a/hw/omap2.c
> +++ b/hw/omap2.c
> @@ -2282,8 +2282,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion
> *sysmem,
> cpu_irq = arm_pic_init_cpu(s->env);
> s->ih[0] = qdev_create(NULL, "omap2-intc");
> qdev_prop_set_uint8(s->ih[0], "revision", 0x21);
> - qdev_prop_set_ptr(s->ih[0], "fclk", omap_findclk(s, "mpu_intc_fclk"));
> - qdev_prop_set_ptr(s->ih[0], "iclk", omap_findclk(s, "mpu_intc_iclk"));
> + omap_prop_set_clk(s, s->ih[0], "fclk", "mpu_intc_fclk");
> + omap_prop_set_clk(s, s->ih[0], "iclk", "mpu_intc_iclk");
> qdev_init_nofail(s->ih[0]);
> busdev = sysbus_from_qdev(s->ih[0]);
> sysbus_connect_irq(busdev, 0, cpu_irq[ARM_PIC_CPU_IRQ]);
> @@ -2408,13 +2408,13 @@ struct omap_mpu_state_s
> *omap2420_mpu_init(MemoryRegion *sysmem,
>
> s->gpio = qdev_create(NULL, "omap2-gpio");
> qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model);
> - qdev_prop_set_ptr(s->gpio, "iclk", omap_findclk(s, "gpio_iclk"));
> - qdev_prop_set_ptr(s->gpio, "fclk0", omap_findclk(s, "gpio1_dbclk"));
> - qdev_prop_set_ptr(s->gpio, "fclk1", omap_findclk(s, "gpio2_dbclk"));
> - qdev_prop_set_ptr(s->gpio, "fclk2", omap_findclk(s, "gpio3_dbclk"));
> - qdev_prop_set_ptr(s->gpio, "fclk3", omap_findclk(s, "gpio4_dbclk"));
> + omap_prop_set_clk(s, s->gpio, "iclk", "gpio_iclk");
> + omap_prop_set_clk(s, s->gpio, "fclk0", "gpio1_dbclk");
> + omap_prop_set_clk(s, s->gpio, "fclk1", "gpio2_dbclk");
> + omap_prop_set_clk(s, s->gpio, "fclk2", "gpio3_dbclk");
> + omap_prop_set_clk(s, s->gpio, "fclk3", "gpio4_dbclk");
> if (s->mpu_model == omap2430) {
> - qdev_prop_set_ptr(s->gpio, "fclk4", omap_findclk(s, "gpio5_dbclk"));
> + omap_prop_set_clk(s, s->gpio, "fclk4", "gpio5_dbclk");
> }
> qdev_init_nofail(s->gpio);
> busdev = sysbus_from_qdev(s->gpio);
> diff --git a/hw/omap_clk.c b/hw/omap_clk.c
> index 8448006..c4c2b80 100644
> --- a/hw/omap_clk.c
> +++ b/hw/omap_clk.c
> @@ -19,14 +19,14 @@
> * with this program; if not, see <http://www.gnu.org/licenses/>.
> */
> #include "hw.h"
> +#include "qdev.h"
> #include "omap.h"
> +#include "qemu/object.h"
>
> -struct clk {
> +struct ClkInfo {
> const char *name;
> const char *alias;
> - struct clk *parent;
> - struct clk *child1;
> - struct clk *sibling;
> + struct ClkInfo *parent;
> #define ALWAYS_ENABLED (1 << 0)
> #define CLOCK_IN_OMAP310 (1 << 10)
> #define CLOCK_IN_OMAP730 (1 << 11)
> @@ -38,6 +38,21 @@ struct clk {
> uint32_t flags;
> int id;
>
> + unsigned long rate; /* Current rate (if .running) */
> + unsigned int divisor; /* Rate relative to input (if .enabled) */
> + unsigned int multiplier; /* Rate relative to input (if .enabled) */
> +};
> +
> +struct clk {
> + Object obj;
> + const char *name;
> + const char *alias;
> + struct clk *parent;
> + struct clk *child1;
> + struct clk *sibling;
> + uint32_t flags;
> + int id;
> +
> int running; /* Is currently ticking */
> int enabled; /* Is enabled, regardless of its input clk */
> unsigned long rate; /* Current rate (if .running) */
> @@ -47,20 +62,26 @@ struct clk {
> int usecount; /* Automatically idle when unused */
> };
>
> -static struct clk xtal_osc12m = {
> +static TypeInfo omap_clk_info = {
> + .name = TYPE_OMAP_CLK,
> + .parent = TYPE_OBJECT,
> + .instance_size = sizeof(struct clk),
> +};
> +
> +static struct ClkInfo xtal_osc12m = {
> .name = "xtal_osc_12m",
> .rate = 12000000,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
> };
>
> -static struct clk xtal_osc32k = {
> +static struct ClkInfo xtal_osc32k = {
> .name = "xtal_osc_32k",
> .rate = 32768,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
> CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> };
>
> -static struct clk ck_ref = {
> +static struct ClkInfo ck_ref = {
> .name = "ck_ref",
> .alias = "clkin",
> .parent = &xtal_osc12m,
> @@ -69,33 +90,33 @@ static struct clk ck_ref = {
> };
>
> /* If a dpll is disabled it becomes a bypass, child clocks don't stop */
> -static struct clk dpll1 = {
> +static struct ClkInfo dpll1 = {
> .name = "dpll1",
> .parent = &ck_ref,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
> ALWAYS_ENABLED,
> };
>
> -static struct clk dpll2 = {
> +static struct ClkInfo dpll2 = {
> .name = "dpll2",
> .parent = &ck_ref,
> .flags = CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
> };
>
> -static struct clk dpll3 = {
> +static struct ClkInfo dpll3 = {
> .name = "dpll3",
> .parent = &ck_ref,
> .flags = CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
> };
>
> -static struct clk dpll4 = {
> +static struct ClkInfo dpll4 = {
> .name = "dpll4",
> .parent = &ck_ref,
> .multiplier = 4,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
> };
>
> -static struct clk apll = {
> +static struct ClkInfo apll = {
> .name = "apll",
> .parent = &ck_ref,
> .multiplier = 48,
> @@ -103,25 +124,25 @@ static struct clk apll = {
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
> };
>
> -static struct clk ck_48m = {
> +static struct ClkInfo ck_48m = {
> .name = "ck_48m",
> .parent = &dpll4, /* either dpll4 or apll */
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
> };
>
> -static struct clk ck_dpll1out = {
> +static struct ClkInfo ck_dpll1out = {
> .name = "ck_dpll1out",
> .parent = &dpll1,
> .flags = CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk sossi_ck = {
> +static struct ClkInfo sossi_ck = {
> .name = "ck_sossi",
> .parent = &ck_dpll1out,
> .flags = CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk clkm1 = {
> +static struct ClkInfo clkm1 = {
> .name = "clkm1",
> .alias = "ck_gen1",
> .parent = &dpll1,
> @@ -129,7 +150,7 @@ static struct clk clkm1 = {
> ALWAYS_ENABLED,
> };
>
> -static struct clk clkm2 = {
> +static struct ClkInfo clkm2 = {
> .name = "clkm2",
> .alias = "ck_gen2",
> .parent = &dpll1,
> @@ -137,7 +158,7 @@ static struct clk clkm2 = {
> ALWAYS_ENABLED,
> };
>
> -static struct clk clkm3 = {
> +static struct ClkInfo clkm3 = {
> .name = "clkm3",
> .alias = "ck_gen3",
> .parent = &dpll1, /* either dpll1 or ck_ref */
> @@ -145,7 +166,7 @@ static struct clk clkm3 = {
> ALWAYS_ENABLED,
> };
>
> -static struct clk arm_ck = {
> +static struct ClkInfo arm_ck = {
> .name = "arm_ck",
> .alias = "mpu_ck",
> .parent = &clkm1,
> @@ -153,14 +174,14 @@ static struct clk arm_ck = {
> ALWAYS_ENABLED,
> };
>
> -static struct clk armper_ck = {
> +static struct ClkInfo armper_ck = {
> .name = "armper_ck",
> .alias = "mpuper_ck",
> .parent = &clkm1,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
> };
>
> -static struct clk arm_gpio_ck = {
> +static struct ClkInfo arm_gpio_ck = {
> .name = "arm_gpio_ck",
> .alias = "mpu_gpio_ck",
> .parent = &clkm1,
> @@ -168,21 +189,21 @@ static struct clk arm_gpio_ck = {
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
> };
>
> -static struct clk armxor_ck = {
> +static struct ClkInfo armxor_ck = {
> .name = "armxor_ck",
> .alias = "mpuxor_ck",
> .parent = &ck_ref,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
> };
>
> -static struct clk armtim_ck = {
> +static struct ClkInfo armtim_ck = {
> .name = "armtim_ck",
> .alias = "mputim_ck",
> .parent = &ck_ref, /* either CLKIN or DPLL1 */
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
> };
>
> -static struct clk armwdt_ck = {
> +static struct ClkInfo armwdt_ck = {
> .name = "armwdt_ck",
> .alias = "mpuwd_ck",
> .parent = &clkm1,
> @@ -191,7 +212,7 @@ static struct clk armwdt_ck = {
> ALWAYS_ENABLED,
> };
>
> -static struct clk arminth_ck16xx = {
> +static struct ClkInfo arminth_ck16xx = {
> .name = "arminth_ck",
> .parent = &arm_ck,
> .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
> @@ -202,38 +223,38 @@ static struct clk arminth_ck16xx = {
> */
> };
>
> -static struct clk dsp_ck = {
> +static struct ClkInfo dsp_ck = {
> .name = "dsp_ck",
> .parent = &clkm2,
> .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk dspmmu_ck = {
> +static struct ClkInfo dspmmu_ck = {
> .name = "dspmmu_ck",
> .parent = &clkm2,
> .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
> ALWAYS_ENABLED,
> };
>
> -static struct clk dspper_ck = {
> +static struct ClkInfo dspper_ck = {
> .name = "dspper_ck",
> .parent = &clkm2,
> .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk dspxor_ck = {
> +static struct ClkInfo dspxor_ck = {
> .name = "dspxor_ck",
> .parent = &ck_ref,
> .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk dsptim_ck = {
> +static struct ClkInfo dsptim_ck = {
> .name = "dsptim_ck",
> .parent = &ck_ref,
> .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk tc_ck = {
> +static struct ClkInfo tc_ck = {
> .name = "tc_ck",
> .parent = &clkm3,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
> @@ -241,7 +262,7 @@ static struct clk tc_ck = {
> ALWAYS_ENABLED,
> };
>
> -static struct clk arminth_ck15xx = {
> +static struct ClkInfo arminth_ck15xx = {
> .name = "arminth_ck",
> .parent = &tc_ck,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
> @@ -251,33 +272,33 @@ static struct clk arminth_ck15xx = {
> */
> };
>
> -static struct clk tipb_ck = {
> +static struct ClkInfo tipb_ck = {
> /* No-idle controlled by "tc_ck" */
> .name = "tipb_ck",
> .parent = &tc_ck,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
> };
>
> -static struct clk l3_ocpi_ck = {
> +static struct ClkInfo l3_ocpi_ck = {
> /* No-idle controlled by "tc_ck" */
> .name = "l3_ocpi_ck",
> .parent = &tc_ck,
> .flags = CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk tc1_ck = {
> +static struct ClkInfo tc1_ck = {
> .name = "tc1_ck",
> .parent = &tc_ck,
> .flags = CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk tc2_ck = {
> +static struct ClkInfo tc2_ck = {
> .name = "tc2_ck",
> .parent = &tc_ck,
> .flags = CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk dma_ck = {
> +static struct ClkInfo dma_ck = {
> /* No-idle controlled by "tc_ck" */
> .name = "dma_ck",
> .parent = &tc_ck,
> @@ -285,62 +306,62 @@ static struct clk dma_ck = {
> ALWAYS_ENABLED,
> };
>
> -static struct clk dma_lcdfree_ck = {
> +static struct ClkInfo dma_lcdfree_ck = {
> .name = "dma_lcdfree_ck",
> .parent = &tc_ck,
> .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
> };
>
> -static struct clk api_ck = {
> +static struct ClkInfo api_ck = {
> .name = "api_ck",
> .alias = "mpui_ck",
> .parent = &tc_ck,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
> };
>
> -static struct clk lb_ck = {
> +static struct ClkInfo lb_ck = {
> .name = "lb_ck",
> .parent = &tc_ck,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
> };
>
> -static struct clk lbfree_ck = {
> +static struct ClkInfo lbfree_ck = {
> .name = "lbfree_ck",
> .parent = &tc_ck,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
> };
>
> -static struct clk hsab_ck = {
> +static struct ClkInfo hsab_ck = {
> .name = "hsab_ck",
> .parent = &tc_ck,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
> };
>
> -static struct clk rhea1_ck = {
> +static struct ClkInfo rhea1_ck = {
> .name = "rhea1_ck",
> .parent = &tc_ck,
> .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
> };
>
> -static struct clk rhea2_ck = {
> +static struct ClkInfo rhea2_ck = {
> .name = "rhea2_ck",
> .parent = &tc_ck,
> .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
> };
>
> -static struct clk lcd_ck_16xx = {
> +static struct ClkInfo lcd_ck_16xx = {
> .name = "lcd_ck",
> .parent = &clkm3,
> .flags = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730,
> };
>
> -static struct clk lcd_ck_1510 = {
> +static struct ClkInfo lcd_ck_1510 = {
> .name = "lcd_ck",
> .parent = &clkm3,
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
> };
>
> -static struct clk uart1_1510 = {
> +static struct ClkInfo uart1_1510 = {
> .name = "uart1_ck",
> /* Direct from ULPD, no real parent */
> .parent = &armper_ck, /* either armper_ck or dpll4 */
> @@ -348,7 +369,7 @@ static struct clk uart1_1510 = {
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
> };
>
> -static struct clk uart1_16xx = {
> +static struct ClkInfo uart1_16xx = {
> .name = "uart1_ck",
> /* Direct from ULPD, no real parent */
> .parent = &armper_ck,
> @@ -356,7 +377,7 @@ static struct clk uart1_16xx = {
> .flags = CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk uart2_ck = {
> +static struct ClkInfo uart2_ck = {
> .name = "uart2_ck",
> /* Direct from ULPD, no real parent */
> .parent = &armper_ck, /* either armper_ck or dpll4 */
> @@ -365,7 +386,7 @@ static struct clk uart2_ck = {
> ALWAYS_ENABLED,
> };
>
> -static struct clk uart3_1510 = {
> +static struct ClkInfo uart3_1510 = {
> .name = "uart3_ck",
> /* Direct from ULPD, no real parent */
> .parent = &armper_ck, /* either armper_ck or dpll4 */
> @@ -373,7 +394,7 @@ static struct clk uart3_1510 = {
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
> };
>
> -static struct clk uart3_16xx = {
> +static struct ClkInfo uart3_16xx = {
> .name = "uart3_ck",
> /* Direct from ULPD, no real parent */
> .parent = &armper_ck,
> @@ -381,7 +402,7 @@ static struct clk uart3_16xx = {
> .flags = CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk usb_clk0 = { /* 6 MHz output on W4_USB_CLK0 */
> +static struct ClkInfo usb_clk0 = { /* 6 MHz output on W4_USB_CLK0 */
> .name = "usb_clk0",
> .alias = "usb.clko",
> /* Direct from ULPD, no parent */
> @@ -389,14 +410,14 @@ static struct clk usb_clk0 = { /* 6 MHz output on
> W4_USB_CLK0 */
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
> };
>
> -static struct clk usb_hhc_ck1510 = {
> +static struct ClkInfo usb_hhc_ck1510 = {
> .name = "usb_hhc_ck",
> /* Direct from ULPD, no parent */
> .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
> };
>
> -static struct clk usb_hhc_ck16xx = {
> +static struct ClkInfo usb_hhc_ck16xx = {
> .name = "usb_hhc_ck",
> /* Direct from ULPD, no parent */
> .rate = 48000000,
> @@ -404,7 +425,7 @@ static struct clk usb_hhc_ck16xx = {
> .flags = CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk usb_w2fc_mclk = {
> +static struct ClkInfo usb_w2fc_mclk = {
> .name = "usb_w2fc_mclk",
> .alias = "usb_w2fc_ck",
> .parent = &ck_48m,
> @@ -412,45 +433,45 @@ static struct clk usb_w2fc_mclk = {
> .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk mclk_1510 = {
> +static struct ClkInfo mclk_1510 = {
> .name = "mclk",
> /* Direct from ULPD, no parent. May be enabled by ext hardware. */
> .rate = 12000000,
> .flags = CLOCK_IN_OMAP1510,
> };
>
> -static struct clk bclk_310 = {
> +static struct ClkInfo bclk_310 = {
> .name = "bt_mclk_out", /* Alias midi_mclk_out? */
> .parent = &armper_ck,
> .flags = CLOCK_IN_OMAP310,
> };
>
> -static struct clk mclk_310 = {
> +static struct ClkInfo mclk_310 = {
> .name = "com_mclk_out",
> .parent = &armper_ck,
> .flags = CLOCK_IN_OMAP310,
> };
>
> -static struct clk mclk_16xx = {
> +static struct ClkInfo mclk_16xx = {
> .name = "mclk",
> /* Direct from ULPD, no parent. May be enabled by ext hardware. */
> .flags = CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk bclk_1510 = {
> +static struct ClkInfo bclk_1510 = {
> .name = "bclk",
> /* Direct from ULPD, no parent. May be enabled by ext hardware. */
> .rate = 12000000,
> .flags = CLOCK_IN_OMAP1510,
> };
>
> -static struct clk bclk_16xx = {
> +static struct ClkInfo bclk_16xx = {
> .name = "bclk",
> /* Direct from ULPD, no parent. May be enabled by ext hardware. */
> .flags = CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk mmc1_ck = {
> +static struct ClkInfo mmc1_ck = {
> .name = "mmc_ck",
> .id = 1,
> /* Functional clock is direct from ULPD, interface clock is ARMPER */
> @@ -459,7 +480,7 @@ static struct clk mmc1_ck = {
> .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
> };
>
> -static struct clk mmc2_ck = {
> +static struct ClkInfo mmc2_ck = {
> .name = "mmc_ck",
> .id = 2,
> /* Functional clock is direct from ULPD, interface clock is ARMPER */
> @@ -468,25 +489,25 @@ static struct clk mmc2_ck = {
> .flags = CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk cam_mclk = {
> +static struct ClkInfo cam_mclk = {
> .name = "cam.mclk",
> .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
> .rate = 12000000,
> };
>
> -static struct clk cam_exclk = {
> +static struct ClkInfo cam_exclk = {
> .name = "cam.exclk",
> .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
> /* Either 12M from cam.mclk or 48M from dpll4 */
> .parent = &cam_mclk,
> };
>
> -static struct clk cam_lclk = {
> +static struct ClkInfo cam_lclk = {
> .name = "cam.lclk",
> .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
> };
>
> -static struct clk i2c_fck = {
> +static struct ClkInfo i2c_fck = {
> .name = "i2c_fck",
> .id = 1,
> .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
> @@ -494,349 +515,349 @@ static struct clk i2c_fck = {
> .parent = &armxor_ck,
> };
>
> -static struct clk i2c_ick = {
> +static struct ClkInfo i2c_ick = {
> .name = "i2c_ick",
> .id = 1,
> .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
> .parent = &armper_ck,
> };
>
> -static struct clk clk32k = {
> +static struct ClkInfo clk32k = {
> .name = "clk32-kHz",
> .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
> CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
> .parent = &xtal_osc32k,
> };
>
> -static struct clk ref_clk = {
> +static struct ClkInfo ref_clk = {
> .name = "ref_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
> .rate = 12000000, /* 12 MHz or 13 MHz or 19.2 MHz */
> /*.parent = sys.xtalin */
> };
>
> -static struct clk apll_96m = {
> +static struct ClkInfo apll_96m = {
> .name = "apll_96m",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
> .rate = 96000000,
> /*.parent = ref_clk */
> };
>
> -static struct clk apll_54m = {
> +static struct ClkInfo apll_54m = {
> .name = "apll_54m",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
> .rate = 54000000,
> /*.parent = ref_clk */
> };
>
> -static struct clk sys_clk = {
> +static struct ClkInfo sys_clk = {
> .name = "sys_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
> .rate = 32768,
> /*.parent = sys.xtalin */
> };
>
> -static struct clk sleep_clk = {
> +static struct ClkInfo sleep_clk = {
> .name = "sleep_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
> .rate = 32768,
> /*.parent = sys.xtalin */
> };
>
> -static struct clk dpll_ck = {
> +static struct ClkInfo dpll_ck = {
> .name = "dpll",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
> .parent = &ref_clk,
> };
>
> -static struct clk dpll_x2_ck = {
> +static struct ClkInfo dpll_x2_ck = {
> .name = "dpll_x2",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
> .parent = &ref_clk,
> };
>
> -static struct clk wdt1_sys_clk = {
> +static struct ClkInfo wdt1_sys_clk = {
> .name = "wdt1_sys_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
> .rate = 32768,
> /*.parent = sys.xtalin */
> };
>
> -static struct clk func_96m_clk = {
> +static struct ClkInfo func_96m_clk = {
> .name = "func_96m_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .divisor = 1,
> .parent = &apll_96m,
> };
>
> -static struct clk func_48m_clk = {
> +static struct ClkInfo func_48m_clk = {
> .name = "func_48m_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .divisor = 2,
> .parent = &apll_96m,
> };
>
> -static struct clk func_12m_clk = {
> +static struct ClkInfo func_12m_clk = {
> .name = "func_12m_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .divisor = 8,
> .parent = &apll_96m,
> };
>
> -static struct clk func_54m_clk = {
> +static struct ClkInfo func_54m_clk = {
> .name = "func_54m_clk",
> .flags = CLOCK_IN_OMAP242X,
> .divisor = 1,
> .parent = &apll_54m,
> };
>
> -static struct clk sys_clkout = {
> +static struct ClkInfo sys_clkout = {
> .name = "clkout",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk sys_clkout2 = {
> +static struct ClkInfo sys_clkout2 = {
> .name = "clkout2",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk core_clk = {
> +static struct ClkInfo core_clk = {
> .name = "core_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &dpll_x2_ck, /* Switchable between dpll_ck and clk32k */
> };
>
> -static struct clk l3_clk = {
> +static struct ClkInfo l3_clk = {
> .name = "l3_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_clk,
> };
>
> -static struct clk core_l4_iclk = {
> +static struct ClkInfo core_l4_iclk = {
> .name = "core_l4_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &l3_clk,
> };
>
> -static struct clk wu_l4_iclk = {
> +static struct ClkInfo wu_l4_iclk = {
> .name = "wu_l4_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &l3_clk,
> };
>
> -static struct clk core_l3_iclk = {
> +static struct ClkInfo core_l3_iclk = {
> .name = "core_l3_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_clk,
> };
>
> -static struct clk core_l4_usb_clk = {
> +static struct ClkInfo core_l4_usb_clk = {
> .name = "core_l4_usb_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &l3_clk,
> };
>
> -static struct clk wu_gpt1_clk = {
> +static struct ClkInfo wu_gpt1_clk = {
> .name = "wu_gpt1_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk wu_32k_clk = {
> +static struct ClkInfo wu_32k_clk = {
> .name = "wu_32k_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk uart1_fclk = {
> +static struct ClkInfo uart1_fclk = {
> .name = "uart1_fclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &func_48m_clk,
> };
>
> -static struct clk uart1_iclk = {
> +static struct ClkInfo uart1_iclk = {
> .name = "uart1_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_l4_iclk,
> };
>
> -static struct clk uart2_fclk = {
> +static struct ClkInfo uart2_fclk = {
> .name = "uart2_fclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &func_48m_clk,
> };
>
> -static struct clk uart2_iclk = {
> +static struct ClkInfo uart2_iclk = {
> .name = "uart2_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_l4_iclk,
> };
>
> -static struct clk uart3_fclk = {
> +static struct ClkInfo uart3_fclk = {
> .name = "uart3_fclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &func_48m_clk,
> };
>
> -static struct clk uart3_iclk = {
> +static struct ClkInfo uart3_iclk = {
> .name = "uart3_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_l4_iclk,
> };
>
> -static struct clk mpu_fclk = {
> +static struct ClkInfo mpu_fclk = {
> .name = "mpu_fclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_clk,
> };
>
> -static struct clk mpu_iclk = {
> +static struct ClkInfo mpu_iclk = {
> .name = "mpu_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_clk,
> };
>
> -static struct clk int_m_fclk = {
> +static struct ClkInfo int_m_fclk = {
> .name = "int_m_fclk",
> .alias = "mpu_intc_fclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_clk,
> };
>
> -static struct clk int_m_iclk = {
> +static struct ClkInfo int_m_iclk = {
> .name = "int_m_iclk",
> .alias = "mpu_intc_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_clk,
> };
>
> -static struct clk core_gpt2_clk = {
> +static struct ClkInfo core_gpt2_clk = {
> .name = "core_gpt2_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk core_gpt3_clk = {
> +static struct ClkInfo core_gpt3_clk = {
> .name = "core_gpt3_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk core_gpt4_clk = {
> +static struct ClkInfo core_gpt4_clk = {
> .name = "core_gpt4_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk core_gpt5_clk = {
> +static struct ClkInfo core_gpt5_clk = {
> .name = "core_gpt5_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk core_gpt6_clk = {
> +static struct ClkInfo core_gpt6_clk = {
> .name = "core_gpt6_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk core_gpt7_clk = {
> +static struct ClkInfo core_gpt7_clk = {
> .name = "core_gpt7_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk core_gpt8_clk = {
> +static struct ClkInfo core_gpt8_clk = {
> .name = "core_gpt8_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk core_gpt9_clk = {
> +static struct ClkInfo core_gpt9_clk = {
> .name = "core_gpt9_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk core_gpt10_clk = {
> +static struct ClkInfo core_gpt10_clk = {
> .name = "core_gpt10_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk core_gpt11_clk = {
> +static struct ClkInfo core_gpt11_clk = {
> .name = "core_gpt11_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk core_gpt12_clk = {
> +static struct ClkInfo core_gpt12_clk = {
> .name = "core_gpt12_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &sys_clk,
> };
>
> -static struct clk mcbsp1_clk = {
> +static struct ClkInfo mcbsp1_clk = {
> .name = "mcbsp1_cg",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .divisor = 2,
> .parent = &func_96m_clk,
> };
>
> -static struct clk mcbsp2_clk = {
> +static struct ClkInfo mcbsp2_clk = {
> .name = "mcbsp2_cg",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .divisor = 2,
> .parent = &func_96m_clk,
> };
>
> -static struct clk emul_clk = {
> +static struct ClkInfo emul_clk = {
> .name = "emul_ck",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &func_54m_clk,
> };
>
> -static struct clk sdma_fclk = {
> +static struct ClkInfo sdma_fclk = {
> .name = "sdma_fclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &l3_clk,
> };
>
> -static struct clk sdma_iclk = {
> +static struct ClkInfo sdma_iclk = {
> .name = "sdma_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_l3_iclk, /* core_l4_iclk for the configuration port */
> };
>
> -static struct clk i2c1_fclk = {
> +static struct ClkInfo i2c1_fclk = {
> .name = "i2c1.fclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &func_12m_clk,
> .divisor = 1,
> };
>
> -static struct clk i2c1_iclk = {
> +static struct ClkInfo i2c1_iclk = {
> .name = "i2c1.iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_l4_iclk,
> };
>
> -static struct clk i2c2_fclk = {
> +static struct ClkInfo i2c2_fclk = {
> .name = "i2c2.fclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &func_12m_clk,
> .divisor = 1,
> };
>
> -static struct clk i2c2_iclk = {
> +static struct ClkInfo i2c2_iclk = {
> .name = "i2c2.iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_l4_iclk,
> };
>
> -static struct clk gpio_dbclk[5] = {
> +static struct ClkInfo gpio_dbclk[5] = {
> {
> .name = "gpio1_dbclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> @@ -860,25 +881,25 @@ static struct clk gpio_dbclk[5] = {
> },
> };
>
> -static struct clk gpio_iclk = {
> +static struct ClkInfo gpio_iclk = {
> .name = "gpio_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &wu_l4_iclk,
> };
>
> -static struct clk mmc_fck = {
> +static struct ClkInfo mmc_fck = {
> .name = "mmc_fclk",
> .flags = CLOCK_IN_OMAP242X,
> .parent = &func_96m_clk,
> };
>
> -static struct clk mmc_ick = {
> +static struct ClkInfo mmc_ick = {
> .name = "mmc_iclk",
> .flags = CLOCK_IN_OMAP242X,
> .parent = &core_l4_iclk,
> };
>
> -static struct clk spi_fclk[3] = {
> +static struct ClkInfo spi_fclk[3] = {
> {
> .name = "spi1_fclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> @@ -894,7 +915,7 @@ static struct clk spi_fclk[3] = {
> },
> };
>
> -static struct clk dss_clk[2] = {
> +static struct ClkInfo dss_clk[2] = {
> {
> .name = "dss_clk1",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> @@ -906,25 +927,25 @@ static struct clk dss_clk[2] = {
> },
> };
>
> -static struct clk dss_54m_clk = {
> +static struct ClkInfo dss_54m_clk = {
> .name = "dss_54m_clk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &func_54m_clk,
> };
>
> -static struct clk dss_l3_iclk = {
> +static struct ClkInfo dss_l3_iclk = {
> .name = "dss_l3_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_l3_iclk,
> };
>
> -static struct clk dss_l4_iclk = {
> +static struct ClkInfo dss_l4_iclk = {
> .name = "dss_l4_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> .parent = &core_l4_iclk,
> };
>
> -static struct clk spi_iclk[3] = {
> +static struct ClkInfo spi_iclk[3] = {
> {
> .name = "spi1_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> @@ -940,14 +961,14 @@ static struct clk spi_iclk[3] = {
> },
> };
>
> -static struct clk omapctrl_clk = {
> +static struct ClkInfo omapctrl_clk = {
> .name = "omapctrl_iclk",
> .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
> /* XXX Should be in WKUP domain */
> .parent = &core_l4_iclk,
> };
>
> -static struct clk *onchip_clks[] = {
> +static struct ClkInfo *onchip_clks[] = {
> /* OMAP 1 */
>
> /* non-ULPD clocks */
> @@ -1219,7 +1240,9 @@ int64_t omap_clk_getrate(omap_clk clk)
>
> void omap_clk_init(struct omap_mpu_state_s *mpu)
> {
> - struct clk **i, *j, *k;
> + Object *clocks;
> + struct ClkInfo **i;
> + struct clk *j;
> int count;
> int flag;
>
> @@ -1236,29 +1259,57 @@ void omap_clk_init(struct omap_mpu_state_s *mpu)
> else
> return;
>
> - for (i = onchip_clks, count = 0; *i; i ++)
> - if ((*i)->flags & flag)
> - count ++;
> + clocks = object_new("container");
> + object_property_add_child(object_get_root(), "clocks",
> + clocks, NULL);
> +
> + for (i = onchip_clks, count = 0; *i; i++) {
> + if ((*i)->flags & flag) {
> + count++;
> + }
> + }
> mpu->clks = (struct clk *) g_malloc0(sizeof(struct clk) * (count + 1));
> - for (i = onchip_clks, j = mpu->clks; *i; i ++)
> + for (i = onchip_clks, j = mpu->clks; *i; i++) {
> + if ((*i)->flags & flag) {
> + object_initialize(j, TYPE_OMAP_CLK);
> + j->name = (*i)->name;
> + j->alias = (*i)->alias;
> + j->flags = (*i)->flags;
> + j->id = (*i)->id;
> + j->rate = (*i)->rate;
> + j->divisor = (*i)->divisor ?: 1;
> + j->multiplier = (*i)->multiplier ?: 1;
> + object_property_add_child(clocks, j->name, OBJECT(j), NULL);
> + j++;
> + }
> + }
> +
> + for (i = onchip_clks, j = mpu->clks; *i; i++) {
> if ((*i)->flags & flag) {
> - memcpy(j, *i, sizeof(struct clk));
> - for (k = mpu->clks; k < j; k ++)
> - if (j->parent && !strcmp(j->parent->name, k->name)) {
> - j->parent = k;
> - j->sibling = k->child1;
> - k->child1 = j;
> - } else if (k->parent && !strcmp(k->parent->name, j->name)) {
> - k->parent = j;
> - k->sibling = j->child1;
> - j->child1 = k;
> - }
> - j->divisor = j->divisor ?: 1;
> - j->multiplier = j->multiplier ?: 1;
> - j ++;
> + if ((*i)->parent) {
> + j->parent = omap_findclk(mpu, (*i)->parent->name);
> + j->sibling = j->parent->child1;
> + j->parent->child1 = j;
> + }
> + j++;
> }
> - for (j = mpu->clks; count --; j ++) {
> + }
> +
> + for (j = mpu->clks; count--; j++) {
> omap_clk_update(j);
> omap_clk_rate_update(j);
> }
> }
> +
> +void omap_prop_set_clk(struct omap_mpu_state_s *s, DeviceState *dev,
> + const char *name, const char *clk)
> +{
> + struct clk *target = omap_findclk(s, clk);
> + qdev_prop_set_ptr(dev, name, target);
> +}
> +
> +static void omap_clk_register(void)
> +{
> + type_register_static(&omap_clk_info);
> +}
> +device_init(omap_clk_register)
> --
> 1.7.7.6
>
>
--
12345678901234567890123456789012345678901234567890123456789012345678901234567890
1 2 3 4 5 6 7 8
- [Qemu-devel] [PATCH v2 10/27] qom: use object_resolve_path_type for links, (continued)
- [Qemu-devel] [PATCH v2 10/27] qom: use object_resolve_path_type for links, Paolo Bonzini, 2012/02/04
- [Qemu-devel] [PATCH v2 17/27] qdev: remove parse/print methods for mac properties, Paolo Bonzini, 2012/02/04
- [Qemu-devel] [PATCH v2 20/27] qdev: let QOM free properties, Paolo Bonzini, 2012/02/04
- [Qemu-devel] [PATCH v2 24/27] qdev: initialize properties via QOM, Paolo Bonzini, 2012/02/04
- [Qemu-devel] [PATCH v2 26/27] omap_clk: convert to QOM, Paolo Bonzini, 2012/02/04
- [Qemu-devel] [PATCH v2 16/27] qdev: remove print/parse methods from LostTickPolicy properties, Paolo Bonzini, 2012/02/04
- [Qemu-devel] [PATCH v2 15/27] qdev: remove parse method for string properties, Paolo Bonzini, 2012/02/04
- [Qemu-devel] [PATCH v2 25/27] qdev: remove unused fields from PropertyInfo, Paolo Bonzini, 2012/02/04
- [Qemu-devel] [PATCH v2 21/27] qdev: fix off-by-one, Paolo Bonzini, 2012/02/04
- [Qemu-devel] [PATCH v2 09/27] qom: add object_resolve_path_type, Paolo Bonzini, 2012/02/04