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[Qemu-devel] [PATCH 47/57] target-i386: Implement BEXTR
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 47/57] target-i386: Implement BEXTR |
Date: |
Tue, 19 Feb 2013 09:40:21 -0800 |
Signed-off-by: Richard Henderson <address@hidden>
---
target-i386/translate.c | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 01ff131..d742fe3 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -4026,6 +4026,46 @@ static void gen_sse(CPUX86State *env, DisasContext *s,
int b,
set_cc_op(s, CC_OP_LOGICB + ot);
break;
+ case 0x0f7: /* bextr Gy, Ey, By */
+ if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_BMI1)
+ || !(s->prefix & PREFIX_VEX)
+ || s->vex_l != 0) {
+ goto illegal_op;
+ }
+ ot = s->dflag == 2 ? OT_QUAD : OT_LONG;
+ {
+ TCGv bound, zero;
+
+ gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
+ /* Extract START, and shift the operand.
+ Shifts larger than operand size get zeros. */
+ tcg_gen_ext8u_tl(cpu_A0, cpu_regs[s->vex_v]);
+ tcg_gen_shr_tl(cpu_T[0], cpu_T[0], cpu_A0);
+
+ bound = tcg_const_tl(ot == OT_QUAD ? 63 : 31);
+ zero = tcg_const_tl(0);
+ tcg_gen_movcond_tl(TCG_COND_LEU, cpu_T[0], cpu_A0, bound,
+ cpu_T[0], zero);
+ tcg_temp_free(zero);
+
+ /* Extract the LEN into a mask. Lengths larger than
+ operand size get all ones. */
+ tcg_gen_shri_tl(cpu_A0, cpu_regs[s->vex_v], 8);
+ tcg_gen_ext8u_tl(cpu_A0, cpu_A0);
+ tcg_gen_movcond_tl(TCG_COND_LEU, cpu_A0, cpu_A0, bound,
+ cpu_A0, bound);
+ tcg_temp_free(bound);
+ tcg_gen_movi_tl(cpu_T[1], 1);
+ tcg_gen_shl_tl(cpu_T[1], cpu_T[1], cpu_A0);
+ tcg_gen_subi_tl(cpu_T[1], cpu_T[1], 1);
+ tcg_gen_and_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
+
+ gen_op_mov_reg_T0(ot, reg);
+ gen_op_update1_cc();
+ set_cc_op(s, CC_OP_LOGICB + ot);
+ }
+ break;
+
default:
goto illegal_op;
}
--
1.8.1.2
- [Qemu-devel] [PATCH 42/57] target-i386: Use CC_SRC2 for ADC and SBB, (continued)
- [Qemu-devel] [PATCH 42/57] target-i386: Use CC_SRC2 for ADC and SBB, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 28/57] target-i386: introduce CCPrepare, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 30/57] target-i386: use CCPrepare to generate conditional jumps, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 44/57] target-i386: Decode the VEX prefixes, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 40/57] target-i386: Don't reference ENV through most of cc helpers, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 43/57] target-i386: Tidy prefix parsing, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 08/57] target-i386: move eflags computation closer to gen_op_set_cc_op, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 48/57] target-i386: Implement BLSR, BLSMSK, BLSI, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 45/57] target-i386: Implement MOVBE, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 32/57] target-i386: cleanup temporary macros for CCPrepare, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 47/57] target-i386: Implement BEXTR,
Richard Henderson <=
- [Qemu-devel] [PATCH 27/57] target-i386: optimize setcc instructions, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 19/57] target-i386: no need to flush out cc_op before gen_eob, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 35/57] target-i386: kill cpu_T3, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 50/57] target-i386: Implement MULX, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 09/57] target-i386: compute eflags outside rcl/rcr helper, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 06/57] target-i386: drop cc_op argument of gen_jcc1, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 46/57] target-i386: Implement ANDN, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 54/57] target-i386: Implement ADX extension, Richard Henderson, 2013/02/19
- [Qemu-devel] [PATCH 20/57] target-i386: Move CC discards to set_cc_op, Richard Henderson, 2013/02/19