Am 30.04.2013 13:54, schrieb Alexander Graf:
Am 30.04.2013 um 13:42 schrieb Andreas Färber<address@hidden>:
Am 30.04.2013 08:36, schrieb John Rigby:
From: Alexander Graf<address@hidden>
The cpu_env tcg variable will be used by both the AArch32 and AArch64
handling code. Unstaticify it, so that both sides can make use of it.
Signed-off-by: Alexander Graf<address@hidden>
[...]
---
target-arm/translate.c | 2 +-
target-arm/translate.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 675773a..36537bd 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -59,7 +59,7 @@ static uint32_t gen_opc_condexec_bits[OPC_BUF_SIZE];
#define DISAS_WFI 4
#define DISAS_SWI 5
-static TCGv_ptr cpu_env;
+TCGv_ptr cpu_env;
/* We reuse the same 64-bit temporaries for efficiency. */
static TCGv_i64 cpu_V0, cpu_V1, cpu_M0;
static TCGv_i32 cpu_R[16];
diff --git a/target-arm/translate.h b/target-arm/translate.h
index e727bc6..8ba1433 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -24,4 +24,6 @@ typedef struct DisasContext {
int vec_stride;
} DisasContext;
+extern TCGv_ptr cpu_env;
+
#endif /* TARGET_ARM_TRANSLATE_H */
Alex, have you checked whether the variable can be placed in qom/cpu.c
instead once for all targets? I'd hope that would be possible with an
appropriate typedef (since target_long size etc. are unknown there).
I would prefer to keep the translation context separate from the execution
context.
Not sure if you understood my point? Exposing cpu_env from target-arm
would seem to torpedo our efforts to link target-arm and, e.g.,
target-microblaze together, since they all have cpu_env. I don't really
care if it's qom/cpu.c or tcg/shared.c or renaming to arm_cpu_env. :)