Re: [Qemu-devel] [PATCH v2 2/5] pci: store PCI hole ranges in guestinfo structure

[Michael S. Tsirkin]

On Thu, May 30, 2013 at 02:16:13PM +0200, Gerd Hoffmann wrote:
>   Hi,
> 
> > +    } else {
> > +        guest_info->pci_info.w64.begin = 0x100000000ULL + 
> > above_4g_mem_size;
> > +        guest_info->pci_info.w64.end =  guest_info->pci_info.w64.begin +
> > +            (0x1ULL << 62);
> 
> Doesn't this give unaligned windows?

PCI Bridge windows do not need to be size aligned.

In any case, the windows are *exactly* as calculated
by seabios - apparently it does not size-align windows either.

> > +    /* Set PCI window size the way seabios has always done it. */
> > +    /* TODO: consider just starting at below_4g_mem_size */
> 
> Used to be that way.  Was changed for alignment reasons (i.e. 1G window
> starts at 1G border etc).

Where's the alignment requirement coming from?

> 
> cheers,
>   Gerd