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[Qemu-devel] [PATCH for-next 07/15] tcg-ppc64: Tidy register allocation
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH for-next 07/15] tcg-ppc64: Tidy register allocation order |
Date: |
Mon, 5 Aug 2013 08:28:42 -1000 |
Remove conditionalization from tcg_target_reg_alloc_order, relying on
reserved_regs to prevent register allocation that shouldn't happen.
So R11 is now present in reg_alloc_order for __APPLE__, but also now
reserved.
Sort reg_alloc_order into call-saved, call-clobbered, and parameters.
This reduces the effect of values getting spilled and reloaded before
function calls.
Whether or not it is reserved, R2 (TOC) is always call-clobbered.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/ppc64/tcg-target.c | 46 +++++++++++++++++++++-------------------------
1 file changed, 21 insertions(+), 25 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 2b3d1bb..862e84c 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -99,7 +99,7 @@ static const char * const
tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
#endif
static const int tcg_target_reg_alloc_order[] = {
- TCG_REG_R14,
+ TCG_REG_R14, /* call saved registers */
TCG_REG_R15,
TCG_REG_R16,
TCG_REG_R17,
@@ -109,29 +109,25 @@ static const int tcg_target_reg_alloc_order[] = {
TCG_REG_R21,
TCG_REG_R22,
TCG_REG_R23,
+ TCG_REG_R24,
+ TCG_REG_R25,
+ TCG_REG_R26,
+ TCG_REG_R27,
TCG_REG_R28,
TCG_REG_R29,
TCG_REG_R30,
TCG_REG_R31,
-#ifdef __APPLE__
+ TCG_REG_R12, /* call clobbered, non-arguments */
+ TCG_REG_R11,
TCG_REG_R2,
-#endif
- TCG_REG_R3,
- TCG_REG_R4,
- TCG_REG_R5,
- TCG_REG_R6,
- TCG_REG_R7,
- TCG_REG_R8,
+ TCG_REG_R10, /* call clobbered, arguments */
TCG_REG_R9,
- TCG_REG_R10,
-#ifndef __APPLE__
- TCG_REG_R11,
-#endif
- TCG_REG_R12,
- TCG_REG_R24,
- TCG_REG_R25,
- TCG_REG_R26,
- TCG_REG_R27
+ TCG_REG_R8,
+ TCG_REG_R7,
+ TCG_REG_R6,
+ TCG_REG_R5,
+ TCG_REG_R4,
+ TCG_REG_R3,
};
static const int tcg_target_call_iarg_regs[] = {
@@ -2160,9 +2156,7 @@ static void tcg_target_init (TCGContext *s)
tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
tcg_regset_set32 (tcg_target_call_clobber_regs, 0,
(1 << TCG_REG_R0) |
-#ifdef __APPLE__
(1 << TCG_REG_R2) |
-#endif
(1 << TCG_REG_R3) |
(1 << TCG_REG_R4) |
(1 << TCG_REG_R5) |
@@ -2176,12 +2170,14 @@ static void tcg_target_init (TCGContext *s)
);
tcg_regset_clear (s->reserved_regs);
- tcg_regset_set_reg (s->reserved_regs, TCG_REG_R0);
- tcg_regset_set_reg (s->reserved_regs, TCG_REG_R1);
-#ifndef __APPLE__
- tcg_regset_set_reg (s->reserved_regs, TCG_REG_R2);
+ tcg_regset_set_reg (s->reserved_regs, TCG_REG_R0); /* tcg temp */
+ tcg_regset_set_reg (s->reserved_regs, TCG_REG_R1); /* stack pointer */
+#ifdef __APPLE__
+ tcg_regset_set_reg (s->reserved_regs, TCG_REG_R11); /* ??? */
+#else
+ tcg_regset_set_reg (s->reserved_regs, TCG_REG_R2); /* toc */
#endif
- tcg_regset_set_reg (s->reserved_regs, TCG_REG_R13);
+ tcg_regset_set_reg (s->reserved_regs, TCG_REG_R13); /* thread pointer */
tcg_add_target_add_op_defs (ppc_op_defs);
}
--
1.8.3.1
- [Qemu-devel] [PATCH for-next 00/15] Collection of improvements for tcg/ppc64, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 01/15] tcg-ppc64: Avoid code for nop move, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 02/15] tcg-ppc64: Add an LK argument to tcg_out_call, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 03/15] tcg-ppc64: Use the branch absolute instruction when possible, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 04/15] tcg-ppc64: Don't load the static chain from TCG, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 05/15] tcg-ppc64: Look through the function descriptor when profitable, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 06/15] tcg-ppc64: Move AREG0 to r31, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 07/15] tcg-ppc64: Tidy register allocation order,
Richard Henderson <=
- [Qemu-devel] [PATCH for-next 08/15] tcg-ppc64: Create PowerOpcode, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 09/15] tcg-ppc64: Handle long offsets better, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 10/15] tcg-ppc64: Use indirect jump threading, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 11/15] tcg-ppc64: Setup TCG_REG_TB, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 12/15] tcg-ppc64: Use TCG_REG_TB in tcg_out_movi and tcg_out_mem_long, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 14/15] tcg-ppc64: Streamline tcg_out_tlb_read, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 15/15] tcg-ppc64: Implement CONFIG_QEMU_LDST_OPTIMIZATION, Richard Henderson, 2013/08/05
- [Qemu-devel] [PATCH for-next 13/15] tcg-ppc64: Tidy tcg_target_qemu_prologue, Richard Henderson, 2013/08/05
- Re: [Qemu-devel] [PATCH for-next 00/15] Collection of improvements for tcg/ppc64, Richard Henderson, 2013/08/17