[Qemu-devel] [PATCH v4 23/33] tcg-aarch64: Use ORRI in tcg_out_movi

[Richard Henderson]

The subset of logical immediates that we support is quite quick to test,
and such constants are quite common to want to load.

Signed-off-by: Richard Henderson <address@hidden>
---
 tcg/aarch64/tcg-target.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/tcg/aarch64/tcg-target.c b/tcg/aarch64/tcg-target.c
index cecda05..9effee7 100644
--- a/tcg/aarch64/tcg-target.c
+++ b/tcg/aarch64/tcg-target.c
@@ -573,6 +573,15 @@ static void tcg_out_movi(TCGContext *s, TCGType type, 
TCGReg rd,
         type = TCG_TYPE_I32;
     }
 
+    /* Check for bitfield immediates.  For the benefit of 32-bit quantities,
+       use the sign-extended value.  That lets us match rotated values such
+       as 0xff0000ff with the same 64-bit logic matching 0xffffffffff0000ff.
+       The truncation happens inside tcg_fmt_Rdn_limm.  */
+    if (is_limm(svalue)) {
+        tcg_fmt_Rdn_limm(s, INSN_ORRI, type, rd, TCG_REG_XZR, svalue);
+        return;
+    }
+
     /* Would it take fewer insns to begin with MOVN?  For the value and its
        inverse, count the number of 16-bit lanes that are 0.  For the benefit
        of 32-bit quantities, compare the zero-extended normal value vs the
-- 
1.8.3.1