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[Qemu-devel] [PATCH for-1.8 49/61] target-i386: Introduce mo_stacksize
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH for-1.8 49/61] target-i386: Introduce mo_stacksize |
Date: |
Thu, 7 Nov 2013 11:05:12 +1000 |
Centralize computation of a MO_SIZE for the stack pointer.
Signed-off-by: Richard Henderson <address@hidden>
---
target-i386/translate.c | 43 ++++++++++++++++++-------------------------
1 file changed, 18 insertions(+), 25 deletions(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 529a122..99b8e9e 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -308,6 +308,12 @@ static inline TCGMemOp mo_pushpop(DisasContext *s,
TCGMemOp ot)
}
}
+/* Select the size of the stack pointer. */
+static inline TCGMemOp mo_stacksize(DisasContext *s)
+{
+ return CODE64(s) ? MO_64 : s->ss32 ? MO_32 : MO_16;
+}
+
/* Select only size 64 else 32. Used for SSE operand sizes. */
static inline TCGMemOp mo_64_32(TCGMemOp ot)
{
@@ -2263,37 +2269,24 @@ gen_svm_check_intercept(DisasContext *s, target_ulong
pc_start, uint64_t type)
static inline void gen_stack_update(DisasContext *s, int addend)
{
-#ifdef TARGET_X86_64
- if (CODE64(s)) {
- gen_op_add_reg_im(MO_64, R_ESP, addend);
- } else
-#endif
- if (s->ss32) {
- gen_op_add_reg_im(MO_32, R_ESP, addend);
- } else {
- gen_op_add_reg_im(MO_16, R_ESP, addend);
- }
+ gen_op_add_reg_im(mo_stacksize(s), R_ESP, addend);
}
/* Generate a push. It depends on ss32, addseg and dflag. */
static void gen_push_v(DisasContext *s, TCGv val)
{
- TCGMemOp a_ot, d_ot = mo_pushpop(s, s->dflag);
+ TCGMemOp d_ot = mo_pushpop(s, s->dflag);
+ TCGMemOp a_ot = mo_stacksize(s);
int size = 1 << d_ot;
TCGv new_esp = cpu_A0;
tcg_gen_subi_tl(cpu_A0, cpu_regs[R_ESP], size);
- if (CODE64(s)) {
- a_ot = MO_64;
- } else {
- a_ot = s->ss32 ? MO_32 : MO_16;
- if (s->addseg) {
- new_esp = cpu_tmp4;
- tcg_gen_mov_tl(new_esp, cpu_A0);
- }
- gen_lea_v_seg(s, a_ot, cpu_A0, R_SS, -1);
+ if (s->addseg) {
+ new_esp = cpu_tmp4;
+ tcg_gen_mov_tl(new_esp, cpu_A0);
}
+ gen_lea_v_seg(s, a_ot, cpu_A0, R_SS, -1);
gen_op_st_v(s, d_ot, val, cpu_A0);
gen_op_mov_reg_v(a_ot, R_ESP, new_esp);
@@ -2308,7 +2301,7 @@ static TCGMemOp gen_pop_T0(DisasContext *s)
if (CODE64(s)) {
addr = cpu_regs[R_ESP];
} else {
- gen_lea_v_seg(s, s->ss32 ? MO_32 : MO_16, cpu_regs[R_ESP], R_SS, -1);
+ gen_lea_v_seg(s, mo_stacksize(s), cpu_regs[R_ESP], R_SS, -1);
addr = cpu_A0;
}
@@ -2323,12 +2316,12 @@ static inline void gen_pop_update(DisasContext *s,
TCGMemOp ot)
static inline void gen_stack_A0(DisasContext *s)
{
- gen_lea_v_seg(s, s->ss32 ? MO_32 : MO_16, cpu_regs[R_ESP], R_SS, -1);
+ gen_lea_v_seg(s, mo_stacksize(s), cpu_regs[R_ESP], R_SS, -1);
}
static void gen_pusha(DisasContext *s)
{
- TCGMemOp s_ot = s->ss32 ? MO_32 : MO_16;
+ TCGMemOp s_ot = mo_stacksize(s);
TCGMemOp d_ot = s->dflag;
int size = 1 << d_ot;
int i;
@@ -2344,7 +2337,7 @@ static void gen_pusha(DisasContext *s)
static void gen_popa(DisasContext *s)
{
- TCGMemOp s_ot = s->ss32 ? MO_32 : MO_16;
+ TCGMemOp s_ot = mo_stacksize(s);
TCGMemOp d_ot = s->dflag;
int size = 1 << d_ot;
int i;
@@ -2366,7 +2359,7 @@ static void gen_popa(DisasContext *s)
static void gen_enter(DisasContext *s, int esp_addend, int level)
{
TCGMemOp d_ot = mo_pushpop(s, s->dflag);
- TCGMemOp a_ot = CODE64(s) ? MO_64 : s->ss32 ? MO_32 : MO_16;
+ TCGMemOp a_ot = mo_stacksize(s);
int size = 1 << d_ot;
/* Push BP; compute FrameTemp into T1. */
--
1.8.3.1
- [Qemu-devel] [PATCH for-1.8 37/61] target-i386: Change dflag to TCGMemOp, (continued)
- [Qemu-devel] [PATCH for-1.8 37/61] target-i386: Change dflag to TCGMemOp, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 38/61] target-i386: Fix addr32 prefix in gen_lea_modrm, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 39/61] target-i386: Tidy addr16 code in gen_lea_modrm, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 40/61] target-i386: Combine gen_push_T* into gen_push_v, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 41/61] target_i386: Clean up gen_pop_T0, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 42/61] target-i386: Create gen_lea_v_seg, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 43/61] target-i386: Use gen_lea_v_seg in gen_lea_modrm, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 44/61] target-i386: Use gen_lea_v_seg in stack subroutines, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 45/61] target-i386: Tidy cpu_regs initialization, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 46/61] target-i386: Access segs via TCG registers, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 49/61] target-i386: Introduce mo_stacksize,
Richard Henderson <=
- [Qemu-devel] [PATCH for-1.8 50/61] target-i386: Rewrite leave, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 51/61] target-i386: Remove gen_op_mov_reg_T0, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 52/61] target-i386: Remove gen_op_mov_reg_T1, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 53/61] target-i386: Remove gen_op_addl_T0_T1, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 55/61] target-i386: Remove gen_op_mov_reg_A0, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 56/61] target-i386: Remove gen_op_movl_A0_reg, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 54/61] target-i386: Remove gen_op_mov_TN_reg, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 57/61] target-i386: Tidy gen_add_A0_im, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 58/61] target-i386: Tidy some size computation, Richard Henderson, 2013/11/06
- [Qemu-devel] [PATCH for-1.8 59/61] target-i386: Rename gen_op_jmp_T0 to gen_op_jmp_v, Richard Henderson, 2013/11/06