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Re: [Qemu-devel] [PATCH] piix: fix 32bit pci hole
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From: |
Gerd Hoffmann |
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Subject: |
Re: [Qemu-devel] [PATCH] piix: fix 32bit pci hole |
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Date: |
Wed, 27 Nov 2013 07:46:01 +0100 |
> > + i440fx->pci_info.w32.begin = ram_size;
> But this patch also obliterates the high bound, 0xe0000000, which can
> lead to:
> - w32.end - w32.begin <= 512M, or
> - a special case of the former, w32.end < w32.begin.
ram_size is not the total amount of memory, it is low memory only.
There is another parameter to i440fx_init (above_4g_mem_size) which
holds the amount of memory which is going to be mapped above 4G.
Maximum possible value of ram_size is 0xe0000000.
For completeness: On q35 the maximum amount of low mem is 0xb0000000.
> w32.end is set to IO_APIC_DEFAULT_ADDRESS==0xfec00000. (Which is BTW
> fine for OVMF too.) What will happen in a 6G guest, for example?
ram_size = 0xe0000000
above_4g_mem_size = 0xa0000000
cheers,
Gerd