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Re: [Qemu-devel] [PULL 16/76] target-arm: Widen thread-local register st
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PULL 16/76] target-arm: Widen thread-local register state fields to 64 bits |
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Date: |
Wed, 8 Jan 2014 18:32:25 +0000 |
On 7 January 2014 20:03, Peter Maydell <address@hidden> wrote:
> +#ifdef HOST_WORDS_BIGENDIAN
> +#define offsetoflow32(S, M) (offsetof(S, M + sizeof(uint32_t))
Mismatched brackets, won't build on bigendian hosts.
(I happened to randomly run cppcheck, or I'd not have spotted
that.)
Reroll #2 coming up later, though I'll just send the cover letter...
thanks
-- PMM
- [Qemu-devel] [PULL 13/76] target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoder, (continued)
- [Qemu-devel] [PULL 13/76] target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoder, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 01/76] target-arm: A64: add support for ld/st pair, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 07/76] target-arm: A64: add support for 3 src data proc insns, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 06/76] target-arm: A64: add support for move wide instructions, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 05/76] target-arm: A64: add support for add, addi, sub, subi, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 25/76] default-configs: Add config for aarch64-linux-user, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 26/76] target-arm: A64: Add support for dumping AArch64 VFP register state, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 17/76] target-arm: A64: add support for add/sub with carry, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 28/76] target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 16/76] target-arm: Widen thread-local register state fields to 64 bits, Peter Maydell, 2014/01/07
- Re: [Qemu-devel] [PULL 16/76] target-arm: Widen thread-local register state fields to 64 bits,
Peter Maydell <=
- [Qemu-devel] [PULL 21/76] target-arm: A64: support for ld/st/cl exclusive, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 02/76] target-arm: A64: add support for ld/st unsigned imm, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 15/76] target-arm: A64: Implement minimal set of EL0-visible sysregs, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 04/76] target-arm: A64: add support for ld/st with index, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 08/76] target-arm: A64: implement SVC, BRK, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 74/76] target-arm: A64: Add floating-point<->integer conversion instructions, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 32/76] target-arm: A64: Add support for floating point compare, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 37/76] char/cadence_uart: Add missing uart_update_state, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 14/76] target-arm: A64: Implement MRS/MSR/SYS/SYSL, Peter Maydell, 2014/01/07
- [Qemu-devel] [PULL 22/76] linux-user: AArch64: define TARGET_CLONE_BACKWARDS, Peter Maydell, 2014/01/07