Re: [Qemu-devel] [PATCH v2 7/8] target-arm: A64: Add simple SIMD 3-same floating point ops

[Richard Henderson]

On 01/23/2014 07:28 AM, Peter Maydell wrote:
> +            /* Single */
> +            TCGv_i32 tcg_op1 = tcg_temp_new_i32();
> +            TCGv_i32 tcg_op2 = tcg_temp_new_i32();
> +            TCGv_i32 tcg_res = tcg_temp_new_i32();
> +            TCGv_i64 tcg_tmp = tcg_temp_new_i64();
> +
> +            read_vec_element(s, tcg_tmp, rn, pass, MO_32);
> +            tcg_gen_trunc_i64_i32(tcg_op1, tcg_tmp);
> +            read_vec_element(s, tcg_tmp, rm, pass, MO_32);
> +            tcg_gen_trunc_i64_i32(tcg_op2, tcg_tmp);

Update for new _i32 helpers.


r~