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Re: [Qemu-devel] [PATCH v2 00/14] TCG ppc speedups
From: |
Tom Musta |
Subject: |
Re: [Qemu-devel] [PATCH v2 00/14] TCG ppc speedups |
Date: |
Thu, 18 Sep 2014 15:43:59 -0500 |
User-agent: |
Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.6.0 |
On 9/15/2014 10:03 AM, Paolo Bonzini wrote:
> Patches 1-3 speed up softmmu emulation by avoiding TLB flushes on changes
> to IR/DR.
>
> Patches 4-14 speed up emulation in general by rewriting the handling of
> condition registers.
>
> Paolo Bonzini (14):
> ppc: do not look at the MMU index to detect PR/HV mode
> softmmu: support up to 12 MMU modes
> target-ppc: use separate indices for various translation modes
> ppc: introduce ppc_get_cr and ppc_set_cr
> ppc: use CRF_* in fpu_helper.c
> ppc: introduce helpers for mfocrf/mtocrf
> ppc: reorganize gen_compute_fprf
> ppc: introduce gen_op_mfcr/gen_op_mtcr
> ppc: introduce ppc_get_crf and ppc_set_crf
> ppc: use movcond for isel
> ppc: store CR registers in 32 1-bit registers
> ppc: use movcond to implement evsel
> ppc: inline ppc_get_crf/ppc_set_crf when clearer
> ppc: dump all 32 CR bits
>
> include/exec/cpu_ldst.h | 120 ++++++++-
> linux-user/elfload.c | 4 +-
> linux-user/main.c | 9 +-
> linux-user/signal.c | 8 +-
> monitor.c | 9 +-
> target-ppc/cpu.h | 66 ++++-
> target-ppc/excp_helper.c | 5 +-
> target-ppc/fpu_helper.c | 82 +++---
> target-ppc/gdbstub.c | 42 +--
> target-ppc/helper.h | 9 +-
> target-ppc/helper_regs.h | 11 +-
> target-ppc/int_helper.c | 46 +++-
> target-ppc/kvm.c | 11 +-
> target-ppc/machine.c | 9 +
> target-ppc/translate.c | 686
> ++++++++++++++++++++++++-----------------------
> 15 files changed, 631 insertions(+), 486 deletions(-)
>
Paolo: I spent some time reviewing and testing patches 4-14. See my specific
comments.
I also attempted to identify the speedup of just these patches. My test was
booting an Ubunutu 14.04 (PPC64LE) image to the login prompt, checking some of
the timestamps along the way. I was able to observe a speedup on a modest
sized laptop (x86) host
-- about 2%. I did not see any difference on a Power7 host.
- [Qemu-devel] [PATCH 10/14] ppc: use movcond for isel, (continued)
- [Qemu-devel] [PATCH 10/14] ppc: use movcond for isel, Paolo Bonzini, 2014/09/15
- [Qemu-devel] [PATCH 11/14] ppc: store CR registers in 32 1-bit registers, Paolo Bonzini, 2014/09/15
- [Qemu-devel] [PATCH 12/14] ppc: use movcond to implement evsel, Paolo Bonzini, 2014/09/15
- [Qemu-devel] [PATCH 13/14] ppc: inline ppc_set_crf when clearer, Paolo Bonzini, 2014/09/15
- [Qemu-devel] [PATCH 14/14] ppc: dump all 32 CR bits, Paolo Bonzini, 2014/09/15
- Re: [Qemu-devel] [PATCH v2 00/14] TCG ppc speedups,
Tom Musta <=