[Qemu-devel] [PATCH 6/7] gt64xxx: remove isa_mem_base usage

[Hervé Poussineau]

Create a custom address space for PCI memory region and use it for the PCI bus.

However, continue to hardcode VGA window address at 0x10000000 instead of
calculating its address dynamically.

Signed-off-by: Hervé Poussineau <address@hidden>

---
I would be quite happy if someone knowing gt64xxx better than me can provide
a better patch.
---
 hw/mips/gt64xxx_pci.c |   17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
index 1f2fe5f..eb323cb 100644
--- a/hw/mips/gt64xxx_pci.c
+++ b/hw/mips/gt64xxx_pci.c
@@ -240,6 +240,9 @@ typedef struct GT64120State {
     uint32_t regs[GT_REGS];
     PCI_MAPPING_ENTRY(PCI0IO);
     PCI_MAPPING_ENTRY(ISD);
+    MemoryRegion pci0_mem;
+    MemoryRegion vga_window;
+    AddressSpace pci0_mem_as;
 } GT64120State;
 
 /* Adjust range to avoid touching space which isn't mappable via PCI */
@@ -302,7 +305,6 @@ static void gt64120_pci_mapping(GT64120State *s)
       /* Map new IO address */
       s->PCI0IO_start = s->regs[GT_PCI0IOLD] << 21;
       s->PCI0IO_length = ((s->regs[GT_PCI0IOHD] + 1) - (s->regs[GT_PCI0IOLD] & 
0x7f)) << 21;
-      isa_mem_base = s->PCI0IO_start;
       if (s->PCI0IO_length) {
           memory_region_init_alias(&s->PCI0IO_mem, OBJECT(s), "isa_mmio",
                                    get_system_io(), 0, s->PCI0IO_length);
@@ -1124,10 +1126,16 @@ PCIBus *gt64120_register(qemu_irq *pic)
     qdev_init_nofail(dev);
     d = GT64120_PCI_HOST_BRIDGE(dev);
     phb = PCI_HOST_BRIDGE(dev);
+    memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX);
+    address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem");
+    memory_region_init_alias(&d->vga_window, OBJECT(dev), "vga",
+                             &d->pci0_mem, 0xa0000, QEMU_PCI_VGA_MEM_SIZE);
+    memory_region_add_subregion_overlap(get_system_memory(), 0x10000000,
+                                        &d->vga_window, 1);
     phb->bus = pci_register_bus(dev, "pci",
                                 gt64120_pci_set_irq, gt64120_pci_map_irq,
                                 pic,
-                                get_system_memory(),
+                                &d->pci0_mem,
                                 get_system_io(),
                                 PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS);
     memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, 
"isd-mem", 0x1000);
@@ -1142,11 +1150,6 @@ static int gt64120_init(SysBusDevice *dev)
 
     s = GT64120_PCI_HOST_BRIDGE(dev);
 
-    /* FIXME: This value is computed from registers during reset, but some
-       devices (e.g. VGA card) need to know it when they are registered.
-       This also mean that changing the register to change the mapping
-       does not fully work. */
-    isa_mem_base = 0x10000000;
     qemu_register_reset(gt64120_reset, s);
     return 0;
 }
-- 
1.7.10.4