[Qemu-devel] [PATCH 0/3] target-alpha PALcode improvements

[Richard Henderson]

Rather than copying around a block of 8 registers when we swap modes,
let the translator map code generated for PALmode to the shadow regs
directly.  This simplifies PALmode entry and exit sufficiently to
allow these insns to be performed inline.

Sadly, the speedup for this is in the noise.  But I still think it
makes sense.


r~


Richard Henderson (3):
  target-alpha: Use separate TCGv temporaries for the shadow registers
  target-alpha: Inline call_pal
  target-alpha: Inline hw_ret

 target-alpha/cpu.h        |   3 +-
 target-alpha/gdbstub.c    |   4 +-
 target-alpha/helper.c     |  63 ++++++---------
 target-alpha/helper.h     |   3 -
 target-alpha/machine.c    |   4 +-
 target-alpha/sys_helper.c |  22 -----
 target-alpha/translate.c  | 201 ++++++++++++++++++++++++++++++----------------
 7 files changed, 166 insertions(+), 134 deletions(-)

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2.1.0