Re: [Qemu-devel] [PATCH pic32 v2 2/5] Fixed random index generation for TLBWR instruction. It was not quite random and did not skip Wired entries.

[Serge Vakulenko]

On Fri, Jul 3, 2015 at 2:39 PM, Maciej W. Rozycki <address@hidden> wrote:
> On Wed, 1 Jul 2015, Aurelien Jarno wrote:
>
>> Secondly, I don't think calling random() is the correct thing to do.
>> It's an expensive function that is not thread safe. Quoting the
>> specification:
>>
>>   "Within the required constraints of the upper and lower bounds, the
>>   manner in which the processor selects values for the Random register
>>   is implementation-dependent."
>>
>> So it's fine if we use a PRNG like the current code, but I agree we
>> might want to improve it if it has some issues. We want to keep its
>> value reproducible though so that the icount mode works as expected.
>
>  Implementations often implement CP0.Random as a free-running counter that
> decrements between the bounds set as each instruction executes.

That's true as a first approximation, but in a real core the picture
is usually a bit more complicated. Decrementing every clock cycle
consumes too much energy. Decrementing only on TLBWR instruction makes
the sequence too predictable and can result in extra thrashing for
some applications.

Regards,
--Serge

>   Maciej