[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 8/9] linux-user: Fix MIPS N64 trap and break instruct
From: |
Leon Alrae |
Subject: |
[Qemu-devel] [PULL 8/9] linux-user: Fix MIPS N64 trap and break instruction bug |
Date: |
Thu, 16 Jul 2015 09:17:36 +0100 |
From: Andrew Bennett <address@hidden>
For the MIPS N64 ABI when QEMU reads the break/trap instruction so that
it can inspect the break/trap code it reads 8 rather than 4 bytes
which means it finds the code field from the instruction after the
break/trap instruction. This then causes the break/trap handling
code to fail because it does not understand the code number.
The fix forces QEMU to always read 4 bytes of instruction data rather
than deciding how much to read based on the ABI.
Signed-off-by: Andrew Bennett <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
---
linux-user/main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/linux-user/main.c b/linux-user/main.c
index 05914b1..fdee981 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -2577,7 +2577,7 @@ done_syscall:
code = (trap_instr >> 6) & 0x3f;
}
} else {
- ret = get_user_ual(trap_instr, env->active_tc.PC);
+ ret = get_user_u32(trap_instr, env->active_tc.PC);
if (ret != 0) {
goto error;
}
@@ -2611,7 +2611,7 @@ done_syscall:
trap_instr = (instr[0] << 16) | instr[1];
} else {
- ret = get_user_ual(trap_instr, env->active_tc.PC);
+ ret = get_user_u32(trap_instr, env->active_tc.PC);
}
if (ret != 0) {
--
2.1.0
- [Qemu-devel] [PULL 0/9] target-mips queue, Leon Alrae, 2015/07/16
- [Qemu-devel] [PULL 1/9] target-mips: fix MIPS64R6-generic configuration, Leon Alrae, 2015/07/16
- [Qemu-devel] [PULL 4/9] target-mips: fix ASID synchronisation for MIPS MT, Leon Alrae, 2015/07/16
- [Qemu-devel] [PULL 2/9] target-mips: fix to clear MSACSR.Cause, Leon Alrae, 2015/07/16
- [Qemu-devel] [PULL 3/9] disas/mips: fix disassembling R6 instructions, Leon Alrae, 2015/07/16
- [Qemu-devel] [PULL 5/9] target-mips: correct DERET instruction, Leon Alrae, 2015/07/16
- [Qemu-devel] [PULL 6/9] target-mips: fix logically dead code reported by Coverity, Leon Alrae, 2015/07/16
- [Qemu-devel] [PULL 7/9] target-mips: fix resource leak reported by Coverity, Leon Alrae, 2015/07/16
- [Qemu-devel] [PULL 9/9] target-mips: fix page fault address for LWL/LWR/LDL/LDR, Leon Alrae, 2015/07/16
- [Qemu-devel] [PULL 8/9] linux-user: Fix MIPS N64 trap and break instruction bug,
Leon Alrae <=
- Re: [Qemu-devel] [PULL 0/9] target-mips queue, Peter Maydell, 2015/07/16