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Re: [Qemu-devel] [PATCH] target-mips: remove wrong checks for recip.fmt
From: |
Leon Alrae |
Subject: |
Re: [Qemu-devel] [PATCH] target-mips: remove wrong checks for recip.fmt and rsqrt.fmt |
Date: |
Wed, 26 Aug 2015 12:53:09 +0100 |
User-agent: |
Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 |
On 25/08/2015 23:40, Petar Jovanovic wrote:
>> @@ -9839,7 +9837,6 @@ static void gen_farith (DisasContext *ctx, enum
> fopcode op1,
>> opn = "movn.d";
>> break;
>> case OPC_RECIP_D:
>> - check_cp1_64bitmode(ctx);
>
>> I think this needs check_cp1_registers() now, i.e. check for odd fpu
> register access when Status.FR = 0.
>
> This would raise a "reserved instruction" exception. I am not aware that any
> MIPS CPU implementation would throw an exception for e.g. "recip.d
> $f21,$f11" (let me know if that is not the case), and I do not think MIPS
> documentation obliges us to throw an exception either.
MIPS documentation says that this operation is "UNPREDICTABLE" -- software can
never depend on a result and in QEMU we usually raise RI in such cases in
other *.D instructions which is quite handy (it usually indicates the "forgot
to set Status.FR bit" bug in the guest).
Leon