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[Qemu-devel] [PULL 21/36] target-arm: Implement asidx_from_attrs
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 21/36] target-arm: Implement asidx_from_attrs |
Date: |
Thu, 21 Jan 2016 14:56:14 +0000 |
Implement the asidx_from_attrs CPU method to return the
Secure or NonSecure address space as appropriate.
(The function is inline so we can use it directly in target-arm
code to be added in later patches.)
Signed-off-by: Peter Maydell <address@hidden>
Acked-by: Edgar E. Iglesias <address@hidden>
---
target-arm/cpu.c | 1 +
target-arm/cpu.h | 8 ++++++++
2 files changed, 9 insertions(+)
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 57f1754..808ec48 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -1452,6 +1452,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void
*data)
cc->do_interrupt = arm_cpu_do_interrupt;
cc->do_unaligned_access = arm_cpu_do_unaligned_access;
cc->get_phys_page_debug = arm_cpu_get_phys_page_debug;
+ cc->asidx_from_attrs = arm_asidx_from_attrs;
cc->vmsd = &vmstate_arm_cpu;
cc->virtio_is_big_endian = arm_cpu_is_big_endian;
cc->write_elf64_note = arm_cpu_write_elf64_note;
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 9108b5b..ee873b7 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1997,4 +1997,12 @@ enum {
QEMU_PSCI_CONDUIT_HVC = 2,
};
+#ifndef CONFIG_USER_ONLY
+/* Return the address space index to use for a memory access */
+static inline int arm_asidx_from_attrs(CPUState *cs, MemTxAttrs attrs)
+{
+ return attrs.secure ? ARMASIdx_S : ARMASIdx_NS;
+}
+#endif
+
#endif
--
1.9.1
- [Qemu-devel] [PULL 29/36] target-arm: Move aarch64_cpu_do_interrupt() to helper.c, (continued)
- [Qemu-devel] [PULL 29/36] target-arm: Move aarch64_cpu_do_interrupt() to helper.c, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 26/36] hw/arm/virt: Add always-on property to the virt board timer, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 30/36] target-arm: Use a single entry point for AArch64 and AArch32 exceptions, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 36/36] target-arm: Implement FPEXC32_EL2 system register, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 08/36] exec.c: Don't set cpu->as until cpu_address_space_init, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 18/36] memory: Add address_space_init_shareable(), Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 24/36] hw/arm/virt: Wire up memory region to CPUs explicitly, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 12/36] cpu: Add new asidx_from_attrs() method, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 16/36] exec.c: Use cpu_get_phys_page_attrs_debug, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 14/36] exec.c: Pass MemTxAttrs to iotlb_to_region so it uses the right AS, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 21/36] target-arm: Implement asidx_from_attrs,
Peter Maydell <=
- [Qemu-devel] [PULL 01/36] qdev: get_child_bus(): Use QOM lookup if available, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 19/36] qom/cpu: Add MemoryRegion property, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 25/36] hw/arm/virt: add secure memory region and UART, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 34/36] target-arm: Implement remaining illegal return event checks, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 10/36] exec-all.h: Document tlb_set_page_with_attrs, tlb_set_page, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 07/36] misc: zynq-xadc: Fix off-by-one, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 11/36] cpu: Add new get_phys_page_attrs_debug() method, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 15/36] exec.c: Add cpu_get_address_space(), Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 04/36] xilinx_spips: Separate the state struct into a header, Peter Maydell, 2016/01/21
- [Qemu-devel] [PULL 09/36] exec.c: Allow target CPUs to define multiple AddressSpaces, Peter Maydell, 2016/01/21