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[Qemu-devel] [PULL 33/36] hw/timer: QOM'ify exynos4210_pwm
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 33/36] hw/timer: QOM'ify exynos4210_pwm |
Date: |
Thu, 18 Feb 2016 14:35:05 +0000 |
From: "xiaoqiang.zhao" <address@hidden>
assign exynos4210_pwm_init to exynos4210_pwm_info.instance_init
and drop the SysBusDeviceClass::init
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: xiaoqiang zhao <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/timer/exynos4210_pwm.c | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/hw/timer/exynos4210_pwm.c b/hw/timer/exynos4210_pwm.c
index 38f941f..0e9e2e9 100644
--- a/hw/timer/exynos4210_pwm.c
+++ b/hw/timer/exynos4210_pwm.c
@@ -380,9 +380,10 @@ static const MemoryRegionOps exynos4210_pwm_ops = {
/*
* PWM timer initialization
*/
-static int exynos4210_pwm_init(SysBusDevice *dev)
+static void exynos4210_pwm_init(Object *obj)
{
- Exynos4210PWMState *s = EXYNOS4210_PWM(dev);
+ Exynos4210PWMState *s = EXYNOS4210_PWM(obj);
+ SysBusDevice *dev = SYS_BUS_DEVICE(obj);
int i;
QEMUBH *bh;
@@ -394,19 +395,15 @@ static int exynos4210_pwm_init(SysBusDevice *dev)
s->timer[i].parent = s;
}
- memory_region_init_io(&s->iomem, OBJECT(s), &exynos4210_pwm_ops, s,
+ memory_region_init_io(&s->iomem, obj, &exynos4210_pwm_ops, s,
"exynos4210-pwm", EXYNOS4210_PWM_REG_MEM_SIZE);
sysbus_init_mmio(dev, &s->iomem);
-
- return 0;
}
static void exynos4210_pwm_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
- k->init = exynos4210_pwm_init;
dc->reset = exynos4210_pwm_reset;
dc->vmsd = &vmstate_exynos4210_pwm_state;
}
@@ -415,6 +412,7 @@ static const TypeInfo exynos4210_pwm_info = {
.name = TYPE_EXYNOS4210_PWM,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(Exynos4210PWMState),
+ .instance_init = exynos4210_pwm_init,
.class_init = exynos4210_pwm_class_init,
};
--
1.9.1
- [Qemu-devel] [PULL 00/36] target-arm queue, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 04/36] target-arm: Implement MDCR_EL2.TDRA traps, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 12/36] target-arm: Add the pmceid0 and pmceid1 registers, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 36/36] hw/timer: QOM'ify pxa2xx_timer, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 13/36] target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registers, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 11/36] target-arm: UNDEF in the UNPREDICTABLE SRS-from-System case, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 10/36] target-arm: Combine user-only and softmmu get/set_r13_banked(), Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 35/36] hw/timer: QOM'ify pl031, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 33/36] hw/timer: QOM'ify exynos4210_pwm,
Peter Maydell <=
- [Qemu-devel] [PULL 31/36] hw/timer: QOM'ify arm_timer (pass 2), Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 32/36] hw/timer: QOM'ify exynos4210_mct, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 29/36] hw/sd: use guest error logging rather than fprintf to stderr, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 26/36] hw/sd/pxa2xx_mmci: Add reset function, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 27/36] hw/sd: implement CMD23 (SET_BLOCK_COUNT) for MMC compatibility, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 18/36] hw/sd/sd.c: QOMify, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 15/36] ARM: PL061: Clear PL061 device state after reset, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 01/36] target-arm: correct CNTFRQ access rights, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 03/36] target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA traps, Peter Maydell, 2016/02/18
- [Qemu-devel] [PULL 34/36] hw/timer: QOM'ify exynos4210_rtc, Peter Maydell, 2016/02/18