Re: [Qemu-devel] [V6 0/4] AMD IOMMU

[Michael S. Tsirkin]

On Tue, Mar 01, 2016 at 03:00:09PM +0100, Jan Kiszka wrote:
> On 2016-03-01 14:48, Jan Kiszka wrote:
> > There is likely no way around write-protecting the IOMMU page tables (in
> > KVM mode) once we evaluated and cached them somewhere.
> 
> I mean, when in kvm mode AND having something that caches enabled, of
> course.

Just write-protecting won't be enough either, since
the moment you remove the protection, all bets are off,
and if you don't, guest will start from the same point
when you re-enter and fault again.

What this seems to call for is a new kind of protection
where yes PTE is write protected, but instead of
making PTE writeable (or killing guest)
KVM handles it as an MMIO: emulates the write and then skips the instruction.

Emulation can be in kernel, just writing into guest memory
on behalf of the guest - with some kind of notifier
to flush the vfio cache - or instead it can exit to userspace
and have QEMU handle it like MMIO and write into guest memory.




> Besides vfio, we also still have the question how to deal with virtio
> and DMA remapping, which is probably similarly complicated when some
> vhost technology is involved.
> 
> Jan

Well, that can limit itself to cache valid entries which is presumably
what hardware iommu does.

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> Siemens AG, Corporate Technology, CT RDA ITP SES-DE
> Corporate Competence Center Embedded Linux