[Qemu-devel] [PATCH] target-ppc: Multiple/String Word alignment exception

[Laurent Vivier]

If the processor is in little-endian mode, an alignment interrupt must
occur for the following instructions: lmw, stmw, lswi, lswx, stswi or stswx.

This is what happens with KVM, so change TCG to do the same.

As the instruction can be emulated by the kernel, enable the change
only in softmmu mode.

Signed-off-by: Laurent Vivier <address@hidden>
---
 target-ppc/translate.c | 42 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 6f0e7b4..e33dcf7 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3181,6 +3181,13 @@ static void gen_lmw(DisasContext *ctx)
 {
     TCGv t0;
     TCGv_i32 t1;
+#if !defined(CONFIG_USER_ONLY)
+    if (ctx->le_mode) {
+        gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE);
+        return;
+    }
+#endif
+
     gen_set_access_type(ctx, ACCESS_INT);
     /* NIP cannot be restored if the memory exception comes from an helper */
     gen_update_nip(ctx, ctx->nip - 4);
@@ -3197,6 +3204,13 @@ static void gen_stmw(DisasContext *ctx)
 {
     TCGv t0;
     TCGv_i32 t1;
+#if !defined(CONFIG_USER_ONLY)
+    if (ctx->le_mode) {
+        gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE);
+        return;
+    }
+#endif
+
     gen_set_access_type(ctx, ACCESS_INT);
     /* NIP cannot be restored if the memory exception comes from an helper */
     gen_update_nip(ctx, ctx->nip - 4);
@@ -3224,6 +3238,13 @@ static void gen_lswi(DisasContext *ctx)
     int start = rD(ctx->opcode);
     int ra = rA(ctx->opcode);
     int nr;
+#if !defined(CONFIG_USER_ONLY)
+    if (ctx->le_mode) {
+        gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE);
+        return;
+    }
+#endif
+
 
     if (nb == 0)
         nb = 32;
@@ -3252,6 +3273,13 @@ static void gen_lswx(DisasContext *ctx)
 {
     TCGv t0;
     TCGv_i32 t1, t2, t3;
+#if !defined(CONFIG_USER_ONLY)
+    if (ctx->le_mode) {
+        gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE);
+        return;
+    }
+#endif
+
     gen_set_access_type(ctx, ACCESS_INT);
     /* NIP cannot be restored if the memory exception comes from an helper */
     gen_update_nip(ctx, ctx->nip - 4);
@@ -3273,6 +3301,13 @@ static void gen_stswi(DisasContext *ctx)
     TCGv t0;
     TCGv_i32 t1, t2;
     int nb = NB(ctx->opcode);
+#if !defined(CONFIG_USER_ONLY)
+    if (ctx->le_mode) {
+        gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE);
+        return;
+    }
+#endif
+
     gen_set_access_type(ctx, ACCESS_INT);
     /* NIP cannot be restored if the memory exception comes from an helper */
     gen_update_nip(ctx, ctx->nip - 4);
@@ -3293,6 +3328,13 @@ static void gen_stswx(DisasContext *ctx)
 {
     TCGv t0;
     TCGv_i32 t1, t2;
+#if !defined(CONFIG_USER_ONLY)
+    if (ctx->le_mode) {
+        gen_exception_err(ctx, POWERPC_EXCP_ALIGN, POWERPC_EXCP_ALIGN_LE);
+        return;
+    }
+#endif
+
     gen_set_access_type(ctx, ACCESS_INT);
     /* NIP cannot be restored if the memory exception comes from an helper */
     gen_update_nip(ctx, ctx->nip - 4);
-- 
2.5.5