[Qemu-devel] [PATCH v1 03/10] target-ppc: consolidate store operations

[Nikunj A Dadhania]

Implement macro to consolidate store operations using newer
tcg_gen_qemu_st functions.

Signed-off-by: Nikunj A Dadhania <address@hidden>
---
 target-ppc/translate.c | 37 ++++++++++++++++++-------------------
 1 file changed, 18 insertions(+), 19 deletions(-)

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index b00da0a..c7bbe28 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2495,30 +2495,29 @@ static inline void gen_qemu_ld64(DisasContext *ctx, 
TCGv_i64 arg1, TCGv arg2)
     tcg_gen_qemu_ld_i64(arg1, arg2, ctx->mem_idx, op);
 }
 
-static inline void gen_qemu_st8(DisasContext *ctx, TCGv arg1, TCGv arg2)
-{
-    tcg_gen_qemu_st8(arg1, arg2, ctx->mem_idx);
+#define GEN_QEMU_STORE_TL(stop, op)                                     \
+static void glue(gen_qemu_, stop)(DisasContext *ctx,                    \
+                                  TCGv val,                             \
+                                  TCGv addr)                            \
+{                                                                       \
+    tcg_gen_qemu_st_tl(val, addr, ctx->mem_idx,                         \
+                       op | ctx->default_tcg_memop_mask);               \
 }
 
-static inline void gen_qemu_st16(DisasContext *ctx, TCGv arg1, TCGv arg2)
-{
-    TCGMemOp op = MO_UW | ctx->default_tcg_memop_mask;
-    tcg_gen_qemu_st_tl(arg1, arg2, ctx->mem_idx, op);
-}
+GEN_QEMU_STORE_TL(st8,  MO_UB)
+GEN_QEMU_STORE_TL(st16, MO_UW)
+GEN_QEMU_STORE_TL(st32, MO_UL)
 
-static inline void gen_qemu_st32(DisasContext *ctx, TCGv arg1, TCGv arg2)
-{
-    TCGMemOp op = MO_UL | ctx->default_tcg_memop_mask;
-    tcg_gen_qemu_st_tl(arg1, arg2, ctx->mem_idx, op);
+#define GEN_QEMU_STORE_64(stop, op)                               \
+static void glue(gen_qemu_, glue(stop, _i64))(DisasContext *ctx,  \
+                                              TCGv_i64 val,       \
+                                              TCGv addr)          \
+{                                                                 \
+    tcg_gen_qemu_st_i64(val, addr, ctx->mem_idx,                  \
+                        op | ctx->default_tcg_memop_mask);        \
 }
 
-static void gen_qemu_st32_i64(DisasContext *ctx, TCGv_i64 val, TCGv addr)
-{
-    TCGv tmp = tcg_temp_new();
-    tcg_gen_trunc_i64_tl(tmp, val);
-    gen_qemu_st32(ctx, tmp, addr);
-    tcg_temp_free(tmp);
-}
+GEN_QEMU_STORE_64(st32, MO_UL)
 
 static inline void gen_qemu_st64(DisasContext *ctx, TCGv_i64 arg1, TCGv arg2)
 {
-- 
2.7.4