[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 41/66] ppc: Fix CFAR updates
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 41/66] ppc: Fix CFAR updates |
Date: |
Tue, 6 Sep 2016 13:40:28 +1000 |
From: Benjamin Herrenschmidt <address@hidden>
We were one instruction off
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/translate.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index ac2c79b..bc5b2ee 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3346,7 +3346,7 @@ static void gen_b(DisasContext *ctx)
if (LK(ctx->opcode)) {
gen_setlr(ctx, ctx->nip);
}
- gen_update_cfar(ctx, ctx->nip);
+ gen_update_cfar(ctx, ctx->nip - 4);
gen_goto_tb(ctx, 0, target);
}
@@ -3411,7 +3411,7 @@ static inline void gen_bcond(DisasContext *ctx, int type)
}
tcg_temp_free_i32(temp);
}
- gen_update_cfar(ctx, ctx->nip);
+ gen_update_cfar(ctx, ctx->nip - 4);
if (type == BCOND_IM) {
target_ulong li = (target_long)((int16_t)(BD(ctx->opcode)));
if (likely(AA(ctx->opcode) == 0)) {
@@ -3526,7 +3526,7 @@ static void gen_rfi(DisasContext *ctx)
*/
/* Restore CPU state */
CHK_SV;
- gen_update_cfar(ctx, ctx->nip);
+ gen_update_cfar(ctx, ctx->nip - 4);
gen_helper_rfi(cpu_env);
gen_sync_exception(ctx);
#endif
@@ -3540,7 +3540,7 @@ static void gen_rfid(DisasContext *ctx)
#else
/* Restore CPU state */
CHK_SV;
- gen_update_cfar(ctx, ctx->nip);
+ gen_update_cfar(ctx, ctx->nip - 4);
gen_helper_rfid(cpu_env);
gen_sync_exception(ctx);
#endif
--
2.7.4
- [Qemu-devel] [PULL 26/66] ppc: FP exceptions are always precise, (continued)
- [Qemu-devel] [PULL 26/66] ppc: FP exceptions are always precise, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 25/66] ppc: Don't update the NIP in floating point generated code, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 45/66] ppc: Speed up load/store multiple, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 60/66] ppc: Don't generate dead code on unconditional branches, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 42/66] ppc: Don't set access_type on all load/stores on hash64, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 49/66] target-ppc: add vabsdu[b, h, w] instructions, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 46/66] target-ppc: implement branch-less divw[o][.], David Gibson, 2016/09/05
- [Qemu-devel] [PULL 32/66] ppc: Don't update NIP in DCR access routines, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 51/66] target-ppc: add vslv instruction, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 43/66] ppc: Use a helper to generate "LE unsupported" alignment interrupts, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 41/66] ppc: Fix CFAR updates,
David Gibson <=
- [Qemu-devel] [PULL 48/66] target-ppc: add dtstsfi[q] instructions, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 44/66] ppc: load/store multiple and string insns don't do LE, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 63/66] ppc: Improve a few more helper flags, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 35/66] ppc: Don't update NIP on conditional trap instructions, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 57/66] ppc: Fix macio ESCC legacy mapping, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 61/66] ppc: Improve flags for helpers loading/writing the time facilities, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 33/66] ppc: Don't update NIP in facility unavailable interrupts, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 37/66] ppc: Don't update NIP in dcbz and lscbx, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 29/66] ppc: Make tlb_fill() use new exception helper, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 52/66] target-ppc: add vsrv instruction, David Gibson, 2016/09/05