[Qemu-devel] [PATCH 5/9] target-mips: Abstract mmu_idx from hflags

[James Hogan]

The MIPS mmu_idx is sometimes calculated from hflags without an env
pointer available as cpu_mmu_index() requires.

Create a common hflags_mmu_index() for the purpose of this calculation
which can operate on any hflags, not just with an env pointer, and
update cpu_mmu_index() itself and gen_intermediate_code() to use it.

This will also allow the logic to be more easily updated when a new MMU
mode is added.

Signed-off-by: James Hogan <address@hidden>
Cc: Leon Alrae <address@hidden>
Cc: Aurelien Jarno <address@hidden>
---
 target-mips/cpu.h       | 8 +++++++-
 target-mips/translate.c | 2 +-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 6ea2bf14c817..8ddc965e4735 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -695,9 +695,15 @@ extern uint32_t cpu_rddsp(uint32_t mask_num, CPUMIPSState 
*env);
 #define MMU_MODE1_SUFFIX _super
 #define MMU_MODE2_SUFFIX _user
 #define MMU_USER_IDX 2
+
+static inline int hflags_mmu_index(uint32_t hflags)
+{
+    return hflags & MIPS_HFLAG_KSU;
+}
+
 static inline int cpu_mmu_index (CPUMIPSState *env, bool ifetch)
 {
-    return env->hflags & MIPS_HFLAG_KSU;
+    return hflags_mmu_index(env->hflags);
 }
 
 static inline bool cpu_mips_hw_interrupts_enabled(CPUMIPSState *env)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 8506c39a359c..af17fc95eb8f 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -20004,7 +20004,7 @@ void gen_intermediate_code(CPUMIPSState *env, struct 
TranslationBlock *tb)
 #ifdef CONFIG_USER_ONLY
         ctx.mem_idx = MIPS_HFLAG_UM;
 #else
-        ctx.mem_idx = ctx.hflags & MIPS_HFLAG_KSU;
+        ctx.mem_idx = hflags_mmu_index(ctx.hflags);
 #endif
     ctx.default_tcg_memop_mask = (ctx.insn_flags & ISA_MIPS32R6) ?
                                  MO_UNALN : MO_ALIGN;
-- 
git-series 0.8.10