Re: [Qemu-devel] [PATCH v4 3/3] utils: Add prefetch for Thunderx platform

[Peter Maydell]

On 25 October 2016 at 13:12,  <address@hidden> wrote:
> From: Vijaya Kumar K <address@hidden>
>
> Thunderx pass2 chip requires explicit prefetch
> instruction to give prefetch hint.
>
> To speed up live migration on Thunderx platform,
> prefetch instruction is added in zero buffer check
> function.The below results show live migration time improvement
> with prefetch instruction. VM with 4 VCPUs, 8GB RAM is migrated.
>
> Code for decoding cache size is taken from Richard's patch.

> +#if defined(__aarch64__)
> +#include "qemu/aarch64-cpuid.h"
> +
> +static void __attribute__((constructor)) aarch64_init_cache_size(void)
> +{
> +    uint64_t t;
> +
> +    /* Use the DZP block size as a proxy for the cacheline size,
> +       since the later is not available to userspace.  This seems
> +       to work in practice for existing implementations.  */
> +    asm("mrs %0, dczid_el0" : "=r"(t));
> +    if (pow(2, (t & 0xf)) * 4 >= 128) {

Converting to double and calling a function in the math library
just to determine 2^x seems a bit silly when that is (1 << x).

   dzp_blocksize_bytes = 1 << ((t & 0xf) + 2);

   if (dzp_blocksize_bytes >= 128) {

> +        cache_line_size = 128;
> +    } else {
> +        cache_line_size = 64;
> +    }
> +
> +    get_aarch64_cpu_id();
> +    if (is_thunderx_pass2_cpu()) {
> +        prefetch_line_dist = 3;
> +        prefetch_distance = (prefetch_line_dist * cache_line_size) /
> +                             sizeof(uint64_t);
> +    }
> +}
> +#endif

thanks
-- PMM