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[Qemu-devel] [PULL 01/22] aspeed/smc: handle dummy bytes when doing fast
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 01/22] aspeed/smc: handle dummy bytes when doing fast reads in command mode |
Date: |
Fri, 27 Jan 2017 15:31:56 +0000 |
From: Cédric Le Goater <address@hidden>
When doing fast read, a certain amount of dummy bytes should be sent
before the read. This number is configurable in the controler CE0
Control Register and needs to be modeled using fake transfers to the
flash module.
This only supports command mode. User mode requires more work and a
possible extension of the m25p80 device model.
Signed-off-by: Cédric Le Goater <address@hidden>
Acked-by: Marcin Krzemiński <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/ssi/aspeed_smc.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index ae1ad2d..087b29e 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -69,7 +69,9 @@
#define R_CTRL0 (0x10 / 4)
#define CTRL_CMD_SHIFT 16
#define CTRL_CMD_MASK 0xff
+#define CTRL_DUMMY_HIGH_SHIFT 14
#define CTRL_AST2400_SPI_4BYTE (1 << 13)
+#define CTRL_DUMMY_LOW_SHIFT 6 /* 2 bits [7:6] */
#define CTRL_CE_STOP_ACTIVE (1 << 2)
#define CTRL_CMD_MODE_MASK 0x3
#define CTRL_READMODE 0x0
@@ -485,6 +487,16 @@ static uint32_t aspeed_smc_check_segment_addr(const
AspeedSMCFlash *fl,
return addr;
}
+static int aspeed_smc_flash_dummies(const AspeedSMCFlash *fl)
+{
+ const AspeedSMCState *s = fl->controller;
+ uint32_t r_ctrl0 = s->regs[s->r_ctrl0 + fl->id];
+ uint32_t dummy_high = (r_ctrl0 >> CTRL_DUMMY_HIGH_SHIFT) & 0x1;
+ uint32_t dummy_low = (r_ctrl0 >> CTRL_DUMMY_LOW_SHIFT) & 0x3;
+
+ return ((dummy_high << 2) | dummy_low) * 8;
+}
+
static void aspeed_smc_flash_send_addr(AspeedSMCFlash *fl, uint32_t addr)
{
const AspeedSMCState *s = fl->controller;
@@ -521,6 +533,15 @@ static uint64_t aspeed_smc_flash_read(void *opaque, hwaddr
addr, unsigned size)
aspeed_smc_flash_select(fl);
aspeed_smc_flash_send_addr(fl, addr);
+ /*
+ * Use fake transfers to model dummy bytes. The value should
+ * be configured to some non-zero value in fast read mode and
+ * zero in read mode.
+ */
+ for (i = 0; i < aspeed_smc_flash_dummies(fl); i++) {
+ ssi_transfer(fl->controller->spi, 0xFF);
+ }
+
for (i = 0; i < size; i++) {
ret |= ssi_transfer(s->spi, 0x0) << (8 * i);
}
--
2.7.4
- [Qemu-devel] [PULL 22/22] dma: omap: check dma channel data_type, (continued)
- [Qemu-devel] [PULL 22/22] dma: omap: check dma channel data_type, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 18/22] armv7m: R14 should reset to 0xffffffff, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 19/22] arm: stellaris: make MII accesses complete immediately, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 17/22] armv7m: FAULTMASK should be 0 on reset, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 14/22] armv7m: set CFSR.UNDEFINSTR on undefined instructions, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 13/22] armv7m: honour CCR.STACKALIGN on exception entry, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 09/22] target/arm: Drop IS_M() macro, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 16/22] armv7m: Honour CCR.USERSETMPEND, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 05/22] hw/registerfields.h: Pull FIELD etc macros out of hw/register.h, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 07/22] armv7m: Clear FAULTMASK on return from non-NMI exceptions, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 01/22] aspeed/smc: handle dummy bytes when doing fast reads in command mode,
Peter Maydell <=
- [Qemu-devel] [PULL 02/22] armv7m: MRS/MSR: handle unprivileged access, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 12/22] armv7m: implement CCR, CFSR, HFSR, DFSR, BFAR, and MMFAR, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 06/22] armv7m: Fix reads of CONTROL register bit 1, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 04/22] armv7m: Explicit error for bad vector table, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 11/22] armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 10/22] armv7m_nvic: keep a pointer to the CPU, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 08/22] pflash_cfi01: fix per-device sector length in CFI table, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 15/22] armv7m: Report no-coprocessor faults correctly, Peter Maydell, 2017/01/27
- [Qemu-devel] [PULL 03/22] armv7m: Replace armv7m.hack with unassigned_access handler, Peter Maydell, 2017/01/27
- Re: [Qemu-devel] [PULL 00/22] target-arm queue, no-reply, 2017/01/27