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[Qemu-devel] [PULL 05/12] target-arm: Declare virtio-mmio as dma-coheren
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 05/12] target-arm: Declare virtio-mmio as dma-coherent in dt |
Date: |
Fri, 10 Feb 2017 18:07:55 +0000 |
From: Alexander Graf <address@hidden>
QEMU emulated hardware is always dma coherent with its guest. We do
annotate that correctly on the PCI host controller, but left out
virtio-mmio.
Recent kernels have started to interpret that flag rather than take
dma coherency as granted with virtio-mmio. While that is considered
a kernel bug, as it breaks previously working systems, it showed that
our dt description is incomplete.
This patch adds the respective marker that allows guest OSs to evaluate
that our virtio-mmio devices are indeed cache coherent.
Signed-off-by: Alexander Graf <address@hidden>
Reviewed-by: Laszlo Ersek <address@hidden>
Reviewed-by: Ard Biesheuvel <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/vexpress.c | 1 +
hw/arm/virt.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index 58760f4..e057568 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -452,6 +452,7 @@ static int add_virtio_mmio_node(void *fdt, uint32_t acells,
uint32_t scells,
acells, addr, scells, size);
qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", intc);
qemu_fdt_setprop_cells(fdt, nodename, "interrupts", 0, irq, 1);
+ qemu_fdt_setprop(fdt, nodename, "dma-coherent", NULL, 0);
g_free(nodename);
if (rc) {
return -1;
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 8eef143..d20e627 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -797,6 +797,7 @@ static void create_virtio_devices(const VirtMachineState
*vms, qemu_irq *pic)
qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts",
GIC_FDT_IRQ_TYPE_SPI, irq,
GIC_FDT_IRQ_FLAGS_EDGE_LO_HI);
+ qemu_fdt_setprop(vms->fdt, nodename, "dma-coherent", NULL, 0);
g_free(nodename);
}
}
--
2.7.4
- [Qemu-devel] [PULL 00/12] target-arm queue, Peter Maydell, 2017/02/10
- [Qemu-devel] [PULL 03/12] target-arm: Add support for PMU register PMINTENSET_EL1, Peter Maydell, 2017/02/10
- [Qemu-devel] [PULL 05/12] target-arm: Declare virtio-mmio as dma-coherent in dt,
Peter Maydell <=
- [Qemu-devel] [PULL 04/12] target-arm: Enable vPMU support under TCG mode, Peter Maydell, 2017/02/10
- [Qemu-devel] [PULL 06/12] hw/arm/virt: Declare virtio-mmio as dma cache coherent in ACPI, Peter Maydell, 2017/02/10
- [Qemu-devel] [PULL 07/12] hw/arm/virt: Declare fwcfg as dma cache coherent in ACPI, Peter Maydell, 2017/02/10
- [Qemu-devel] [PULL 09/12] aspeed: check for negative values returned by blk_getlength(), Peter Maydell, 2017/02/10
- [Qemu-devel] [PULL 02/12] target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0, Peter Maydell, 2017/02/10
- [Qemu-devel] [PULL 12/12] aspeed/smc: use a modulo to check segment limits, Peter Maydell, 2017/02/10
- [Qemu-devel] [PULL 11/12] aspeed/smc: handle dummies only in fast read mode, Peter Maydell, 2017/02/10
- [Qemu-devel] [PULL 10/12] aspeed: remove useless comment on controller segment size, Peter Maydell, 2017/02/10
- [Qemu-devel] [PULL 08/12] hw/arm/virt: Declare fwcfg as dma cache coherent in dt, Peter Maydell, 2017/02/10
- [Qemu-devel] [PULL 01/12] target-arm: Add support for PMU register PMSELR_EL0, Peter Maydell, 2017/02/10