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[Qemu-devel] [PATCH v2 22/27] target/sh4: Introduce CHECK_FPSCR_PR_*
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v2 22/27] target/sh4: Introduce CHECK_FPSCR_PR_* |
Date: |
Thu, 6 Jul 2017 16:21:06 -1000 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/sh4/translate.c | 57 +++++++++++++++++++++++++++-----------------------
1 file changed, 31 insertions(+), 26 deletions(-)
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index 06cf649..3d8ac59 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -391,6 +391,16 @@ static inline void gen_store_fpr64(DisasContext *ctx,
TCGv_i64 t, int reg)
goto do_fpu_disabled; \
}
+#define CHECK_FPSCR_PR_0 \
+ if (ctx->tbflags & FPSCR_PR) { \
+ goto do_illegal; \
+ }
+
+#define CHECK_FPSCR_PR_1 \
+ if (!(ctx->tbflags & FPSCR_PR)) { \
+ goto do_illegal; \
+ }
+
static void _decode_opc(DisasContext * ctx)
{
/* This code tries to make movcal emulation sufficiently
@@ -1140,16 +1150,11 @@ static void _decode_opc(DisasContext * ctx)
}
return;
case 0xf00e: /* fmac FR0,RM,Rn */
- {
- CHECK_FPU_ENABLED
- if (ctx->tbflags & FPSCR_PR) {
- goto do_illegal;
- } else {
- gen_helper_fmac_FT(FREG(B11_8), cpu_env,
- FREG(0), FREG(B7_4), FREG(B11_8));
- return;
- }
- }
+ CHECK_FPU_ENABLED
+ CHECK_FPSCR_PR_0
+ gen_helper_fmac_FT(FREG(B11_8), cpu_env,
+ FREG(0), FREG(B7_4), FREG(B11_8));
+ return;
}
switch (ctx->opcode & 0xff00) {
@@ -1750,16 +1755,14 @@ static void _decode_opc(DisasContext * ctx)
break;
case 0xf08d: /* fldi0 FRn - FPSCR: R[PR] */
CHECK_FPU_ENABLED
- if (!(ctx->tbflags & FPSCR_PR)) {
- tcg_gen_movi_i32(FREG(B11_8), 0);
- }
- return;
+ CHECK_FPSCR_PR_0
+ tcg_gen_movi_i32(FREG(B11_8), 0);
+ return;
case 0xf09d: /* fldi1 FRn - FPSCR: R[PR] */
CHECK_FPU_ENABLED
- if (!(ctx->tbflags & FPSCR_PR)) {
- tcg_gen_movi_i32(FREG(B11_8), 0x3f800000);
- }
- return;
+ CHECK_FPSCR_PR_0
+ tcg_gen_movi_i32(FREG(B11_8), 0x3f800000);
+ return;
case 0xf0ad: /* fcnvsd FPUL,DRn */
CHECK_FPU_ENABLED
{
@@ -1780,10 +1783,10 @@ static void _decode_opc(DisasContext * ctx)
return;
case 0xf0ed: /* fipr FVm,FVn */
CHECK_FPU_ENABLED
- if ((ctx->tbflags & FPSCR_PR) == 0) {
- TCGv m, n;
- m = tcg_const_i32((ctx->opcode >> 8) & 3);
- n = tcg_const_i32((ctx->opcode >> 10) & 3);
+ CHECK_FPSCR_PR_1
+ {
+ TCGv m = tcg_const_i32((ctx->opcode >> 8) & 3);
+ TCGv n = tcg_const_i32((ctx->opcode >> 10) & 3);
gen_helper_fipr(cpu_env, m, n);
tcg_temp_free(m);
tcg_temp_free(n);
@@ -1792,10 +1795,12 @@ static void _decode_opc(DisasContext * ctx)
break;
case 0xf0fd: /* ftrv XMTRX,FVn */
CHECK_FPU_ENABLED
- if ((ctx->opcode & 0x0300) == 0x0100 &&
- (ctx->tbflags & FPSCR_PR) == 0) {
- TCGv n;
- n = tcg_const_i32((ctx->opcode >> 10) & 3);
+ CHECK_FPSCR_PR_1
+ {
+ if ((ctx->opcode & 0x0300) != 0x0100) {
+ goto do_illegal;
+ }
+ TCGv n = tcg_const_i32((ctx->opcode >> 10) & 3);
gen_helper_ftrv(cpu_env, n);
tcg_temp_free(n);
return;
--
2.9.4
- Re: [Qemu-devel] [PATCH v2 18/27] target/sh4: Unify code for CHECK_NOT_DELAY_SLOT, (continued)
- [Qemu-devel] [PATCH v2 19/27] target/sh4: Unify code for CHECK_PRIVILEGED, Richard Henderson, 2017/07/06
- [Qemu-devel] [PATCH v2 20/27] target/sh4: Unify code for CHECK_FPU_ENABLED, Richard Henderson, 2017/07/06
- [Qemu-devel] [PATCH v2 21/27] target/sh4: Tidy misc illegal insn checks, Richard Henderson, 2017/07/06
- [Qemu-devel] [PATCH v2 22/27] target/sh4: Introduce CHECK_FPSCR_PR_*,
Richard Henderson <=
- [Qemu-devel] [PATCH v2 24/27] target/sh4: Implement fpchg, Richard Henderson, 2017/07/06
- [Qemu-devel] [PATCH v2 23/27] target/sh4: Introduce CHECK_SH4A, Richard Henderson, 2017/07/06
- [Qemu-devel] [PATCH v2 25/27] target/sh4: Add missing FPSCR.PR == 0 checks, Richard Henderson, 2017/07/06
- [Qemu-devel] [PATCH v2 26/27] target/sh4: Implement fsrra, Richard Henderson, 2017/07/06
- [Qemu-devel] [PATCH v2 27/27] target/sh4: Use tcg_gen_lookup_and_goto_ptr, Richard Henderson, 2017/07/06