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[Qemu-devel] [PULL 07/31] target/sh4: Introduce TB_FLAG_ENVFLAGS_MASK
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PULL 07/31] target/sh4: Introduce TB_FLAG_ENVFLAGS_MASK |
Date: |
Tue, 18 Jul 2017 23:50:26 +0200 |
From: Richard Henderson <address@hidden>
We'll be putting more things into this bitmask soon.
Let's have a name that covers all possible uses.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
target/sh4/cpu.h | 4 +++-
target/sh4/translate.c | 4 ++--
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index ffb91687b8..4aa92d5f30 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -96,6 +96,8 @@
#define DELAY_SLOT_CONDITIONAL (1 << 1)
#define DELAY_SLOT_RTE (1 << 2)
+#define TB_FLAG_ENVFLAGS_MASK DELAY_SLOT_MASK
+
typedef struct tlb_t {
uint32_t vpn; /* virtual page number */
uint32_t ppn; /* physical page number */
@@ -388,7 +390,7 @@ static inline void cpu_get_tb_cpu_state(CPUSH4State *env,
target_ulong *pc,
{
*pc = env->pc;
*cs_base = 0;
- *flags = (env->flags & DELAY_SLOT_MASK) /* Bits 0- 2 */
+ *flags = (env->flags & TB_FLAG_ENVFLAGS_MASK) /* Bits 0-2 */
| (env->fpscr & (FPSCR_FR | FPSCR_SZ | FPSCR_PR)) /* Bits 19-21 */
| (env->sr & ((1u << SR_MD) | (1u << SR_RB))) /* Bits 29-30 */
| (env->sr & (1u << SR_FD)) /* Bit 15 */
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index 310c52ad2a..d6aa053715 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -220,7 +220,7 @@ static inline void gen_save_cpu_state(DisasContext *ctx,
bool save_pc)
if (ctx->delayed_pc != (uint32_t) -1) {
tcg_gen_movi_i32(cpu_delayed_pc, ctx->delayed_pc);
}
- if ((ctx->tbflags & DELAY_SLOT_MASK) != ctx->envflags) {
+ if ((ctx->tbflags & TB_FLAG_ENVFLAGS_MASK) != ctx->envflags) {
tcg_gen_movi_i32(cpu_flags, ctx->envflags);
}
}
@@ -1819,7 +1819,7 @@ void gen_intermediate_code(CPUSH4State * env, struct
TranslationBlock *tb)
pc_start = tb->pc;
ctx.pc = pc_start;
ctx.tbflags = (uint32_t)tb->flags;
- ctx.envflags = tb->flags & DELAY_SLOT_MASK;
+ ctx.envflags = tb->flags & TB_FLAG_ENVFLAGS_MASK;
ctx.bstate = BS_NONE;
ctx.memidx = (ctx.tbflags & (1u << SR_MD)) == 0 ? 1 : 0;
/* We don't know if the delayed pc came from a dynamic or static branch,
--
2.11.0
- [Qemu-devel] [PULL 00/31] target/sh4 queue, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 14/31] target/sh4: Hoist register bank selection, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 18/31] target/sh4: Eliminate unused XREG macro, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 09/31] target/sh4: Adjust TB_FLAG_PENDING_MOVCA, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 02/31] target/sh4: fix FPU unorderered compare, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 07/31] target/sh4: Introduce TB_FLAG_ENVFLAGS_MASK,
Aurelien Jarno <=
- [Qemu-devel] [PULL 19/31] target/sh4: Merge DREG into fpr64 routines, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 24/31] target/sh4: Unify code for CHECK_FPU_ENABLED, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 01/31] target/sh4: do not check for PR bit for fabs instruction, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 26/31] target/sh4: Introduce CHECK_FPSCR_PR_*, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 21/31] target/sh4: Simplify 64-bit fp reg-reg move, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 06/31] target/sh4: Consolidate end-of-TB tests, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 13/31] linux-user/sh4: Clean env->flags on signal boundaries, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 30/31] target/sh4: Implement fsrra, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 17/31] target/sh4: Hoist fp register bank selection, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 25/31] target/sh4: Tidy misc illegal insn checks, Aurelien Jarno, 2017/07/18