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[Qemu-devel] [PULL 30/31] target/sh4: Implement fsrra
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PULL 30/31] target/sh4: Implement fsrra |
Date: |
Tue, 18 Jul 2017 23:50:49 +0200 |
From: Richard Henderson <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
target/sh4/helper.h | 1 +
target/sh4/op_helper.c | 16 ++++++++++++++++
target/sh4/translate.c | 2 ++
3 files changed, 19 insertions(+)
diff --git a/target/sh4/helper.h b/target/sh4/helper.h
index 6c6fa04732..1e768fcbc7 100644
--- a/target/sh4/helper.h
+++ b/target/sh4/helper.h
@@ -37,6 +37,7 @@ DEF_HELPER_FLAGS_3(fsub_FT, TCG_CALL_NO_WG, f32, env, f32,
f32)
DEF_HELPER_FLAGS_3(fsub_DT, TCG_CALL_NO_WG, f64, env, f64, f64)
DEF_HELPER_FLAGS_2(fsqrt_FT, TCG_CALL_NO_WG, f32, env, f32)
DEF_HELPER_FLAGS_2(fsqrt_DT, TCG_CALL_NO_WG, f64, env, f64)
+DEF_HELPER_FLAGS_2(fsrra_FT, TCG_CALL_NO_WG, f32, env, f32)
DEF_HELPER_FLAGS_2(ftrc_FT, TCG_CALL_NO_WG, i32, env, f32)
DEF_HELPER_FLAGS_2(ftrc_DT, TCG_CALL_NO_WG, i32, env, f64)
DEF_HELPER_3(fipr, void, env, i32, i32)
diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c
index 8513f38849..d798f239cf 100644
--- a/target/sh4/op_helper.c
+++ b/target/sh4/op_helper.c
@@ -406,6 +406,22 @@ float64 helper_fsqrt_DT(CPUSH4State *env, float64 t0)
return t0;
}
+float32 helper_fsrra_FT(CPUSH4State *env, float32 t0)
+{
+ set_float_exception_flags(0, &env->fp_status);
+ /* "Approximate" 1/sqrt(x) via actual computation. */
+ t0 = float32_sqrt(t0, &env->fp_status);
+ t0 = float32_div(float32_one, t0, &env->fp_status);
+ /* Since this is supposed to be an approximation, an imprecision
+ exception is required. One supposes this also follows the usual
+ IEEE rule that other exceptions take precidence. */
+ if (get_float_exception_flags(&env->fp_status) == 0) {
+ set_float_exception_flags(float_flag_inexact, &env->fp_status);
+ }
+ update_fpscr(env, GETPC());
+ return t0;
+}
+
float32 helper_fsub_FT(CPUSH4State *env, float32 t0, float32 t1)
{
set_float_exception_flags(0, &env->fp_status);
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index 92a2c002fc..ce84fbb966 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -1731,6 +1731,8 @@ static void _decode_opc(DisasContext * ctx)
return;
case 0xf07d: /* fsrra FRn */
CHECK_FPU_ENABLED
+ CHECK_FPSCR_PR_0
+ gen_helper_fsrra_FT(FREG(B11_8), cpu_env, FREG(B11_8));
break;
case 0xf08d: /* fldi0 FRn - FPSCR: R[PR] */
CHECK_FPU_ENABLED
--
2.11.0
- [Qemu-devel] [PULL 09/31] target/sh4: Adjust TB_FLAG_PENDING_MOVCA, (continued)
- [Qemu-devel] [PULL 09/31] target/sh4: Adjust TB_FLAG_PENDING_MOVCA, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 02/31] target/sh4: fix FPU unorderered compare, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 07/31] target/sh4: Introduce TB_FLAG_ENVFLAGS_MASK, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 19/31] target/sh4: Merge DREG into fpr64 routines, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 24/31] target/sh4: Unify code for CHECK_FPU_ENABLED, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 01/31] target/sh4: do not check for PR bit for fabs instruction, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 26/31] target/sh4: Introduce CHECK_FPSCR_PR_*, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 21/31] target/sh4: Simplify 64-bit fp reg-reg move, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 06/31] target/sh4: Consolidate end-of-TB tests, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 13/31] linux-user/sh4: Clean env->flags on signal boundaries, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 30/31] target/sh4: Implement fsrra,
Aurelien Jarno <=
- [Qemu-devel] [PULL 17/31] target/sh4: Hoist fp register bank selection, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 25/31] target/sh4: Tidy misc illegal insn checks, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 05/31] target/sh4: return result of fcmp using TCG, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 31/31] target/sh4: Use tcg_gen_lookup_and_goto_ptr, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 29/31] target/sh4: Add missing FPSCR.PR == 0 checks, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 20/31] target/sh4: Load/store Dr as 64-bit quantities, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 10/31] target/sh4: Handle user-space atomics, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 28/31] target/sh4: Implement fpchg, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 04/31] target/sh4: do not use a helper to implement fneg, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 22/31] target/sh4: Unify code for CHECK_NOT_DELAY_SLOT, Aurelien Jarno, 2017/07/18