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[Qemu-devel] [PULL 25/48] sdhci: Fix 64-bit ADMA2
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 25/48] sdhci: Fix 64-bit ADMA2 |
Date: |
Tue, 13 Feb 2018 13:00:29 +0100 |
From: Sai Pavan Boddu <address@hidden>
The 64-bit ADMA address is not converted to the cpu endianes correctly.
This patch fixes the issue and uses a valid mask for the attribute data.
Signed-off-by: Sai Pavan Boddu <address@hidden>
[AF: Re-write commit message]
Reviewed-by: Alistair Francis <address@hidden>
Message-Id: <address@hidden>
---
hw/sd/sdhci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 1b3791c..a6322f2 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -667,8 +667,8 @@ static void get_adma_description(SDHCIState *s, ADMADescr
*dscr)
dscr->length = le16_to_cpu(dscr->length);
dma_memory_read(s->dma_as, entry_addr + 4,
(uint8_t *)(&dscr->addr), 8);
- dscr->attr = le64_to_cpu(dscr->attr);
- dscr->attr &= 0xfffffff8;
+ dscr->addr = le64_to_cpu(dscr->addr);
+ dscr->attr &= (uint8_t) ~0xC0;
dscr->incr = 12;
break;
}
--
1.8.3.1
- [Qemu-devel] [PULL 23/48] sdhci: check the Spec v1 capabilities correctness, (continued)
- [Qemu-devel] [PULL 23/48] sdhci: check the Spec v1 capabilities correctness, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 27/48] hw/arm/exynos4210: access the 64-bit capareg with qdev_prop_set_uint64(), Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 20/48] sdhci: add a 'spec_version property' (default to v2), Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 21/48] sdhci: use a numeric value for the default CAPAB register, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 22/48] sdhci: simplify sdhci_get_fifolen(), Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 28/48] hw/arm/exynos4210: add a comment about a very similar SDHCI (Spec. v2), Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 36/48] hw/arm/bcm2835_peripherals: implement SDHCI Spec v3, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 12/48] build-sys: remove useless extra*flags variables, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 19/48] sdhci: add qtest to check the SD Spec version, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 32/48] sdhci: implement the Host Control 2 register (tuning sequence), Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 25/48] sdhci: Fix 64-bit ADMA2,
Paolo Bonzini <=
- [Qemu-devel] [PULL 34/48] sdhci: implement UHS-I voltage switch, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 35/48] sdhci: implement CMD/DAT[] fields in the Present State register, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 33/48] sdbus: add trace events, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 29/48] hw/arm/xilinx_zynq: fix the capabilities register to match the datasheet, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 31/48] sdhci: rename the hostctl1 register, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 40/48] hw/arm/xilinx_zynqmp: enable the UHS-I mode, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 37/48] hw/arm/bcm2835_peripherals: change maximum block size to 1kB, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 38/48] hw/arm/fsl-imx6: implement SDHCI Spec. v3, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 39/48] hw/arm/xilinx_zynqmp: fix the capabilities/spec version to match the datasheet, Paolo Bonzini, 2018/02/13
- [Qemu-devel] [PULL 42/48] sdhci: add a check_capab_v3() qtest, Paolo Bonzini, 2018/02/13