[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v2 6/7] hw/riscv/sifive_u: Move the uart device
From: |
Michael Clark |
Subject: |
Re: [Qemu-devel] [PATCH v2 6/7] hw/riscv/sifive_u: Move the uart device tree node under /soc/ |
Date: |
Sat, 12 May 2018 21:09:30 +1200 |
On Sat, May 12, 2018 at 11:28 AM, Alistair Francis <address@hidden
> wrote:
> Signed-off-by: Alistair Francis <address@hidden>
>
Reviewed-by: Michael Clark <address@hidden>
> ---
> hw/riscv/sifive_u.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 50389cdc90..540d53bf2f 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -194,7 +194,7 @@ static void create_fdt(SiFiveUState *s, const struct
> MemmapEntry *memmap,
> g_free(cells);
> g_free(nodename);
>
> - nodename = g_strdup_printf("/address@hidden",
> + nodename = g_strdup_printf("/soc/address@hidden",
> (long)memmap[SIFIVE_U_UART0].base);
> qemu_fdt_add_subnode(fdt, nodename);
> qemu_fdt_setprop_string(fdt, nodename, "compatible", "sifive,uart0");
> --
> 2.17.0
>
>
- [Qemu-devel] [PATCH v2 0/7] RISC-V: SoCify SiFive boards and connect GEM, Alistair Francis, 2018/05/11
- [Qemu-devel] [PATCH v2 1/7] hw/riscv/sifive_u: Create a U54 SoC object, Alistair Francis, 2018/05/11
- [Qemu-devel] [PATCH v2 2/7] hw/riscv/sifive_e: Create a E31 SoC object, Alistair Francis, 2018/05/11
- [Qemu-devel] [PATCH v2 3/7] hw/riscv/sifive_plic: Use gpios instead of irqs, Alistair Francis, 2018/05/11
- [Qemu-devel] [PATCH v2 4/7] hw/riscv/sifive_u: Set the soc device tree node as a simple-bus, Alistair Francis, 2018/05/11
- [Qemu-devel] [PATCH v2 5/7] hw/riscv/sifive_u: Set the interrupt controler number of interrupts, Alistair Francis, 2018/05/11
- [Qemu-devel] [PATCH v2 6/7] hw/riscv/sifive_u: Move the uart device tree node under /soc/, Alistair Francis, 2018/05/11
- Re: [Qemu-devel] [PATCH v2 6/7] hw/riscv/sifive_u: Move the uart device tree node under /soc/,
Michael Clark <=
- [Qemu-devel] [PATCH v2 7/7] hw/riscv/sifive_u: Connect the Cadence GEM Ethernet device, Alistair Francis, 2018/05/11