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Re: [Qemu-devel] [PATCH v2 11/27] fpu/softfloat: support ARM Alternative
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v2 11/27] fpu/softfloat: support ARM Alternative half-precision |
Date: |
Mon, 14 May 2018 14:52:12 +0100 |
On 12 May 2018 at 01:42, Richard Henderson <address@hidden> wrote:
> From: Alex Bennée <address@hidden>
>
> For float16 ARM supports an alternative half-precision format which
> sacrifices the ability to represent NaN/Inf in return for a higher
> dynamic range. To support this I've added an additional
> FloatFmt (float16_params_ahp).
>
> The new FloatFmt flag (arm_althp) is then used to modify the behaviour
> of canonicalize and round_canonical with respect to representation and
> exception raising.
>
> Finally the float16_to_floatN and floatN_to_float16 conversion
> routines select the new alternative FloatFmt when !ieee.
>
> Signed-off-by: Alex Bennée <address@hidden>
> Signed-off-by: Richard Henderson <address@hidden>
If we do this like this then we have a regression for the
alternate-halfprec conversions between the patch where we change
over the conversions functions and this one.
To fix that we could put the parts of this patch that change
existing-in-master code like round_canonical() first, and then
fold the parts that fix up the conversion functions into the
patch which is currently 10/27.
> ---
> v3
> - squash NaN to 0 if destination is AHP F16
> v4
> - handle inf -> ahp max in float_to_float not round_canonical
> - assert no nan and inf for ahp in round_canonical
> - check ahp before snan in float_to_float
> ---
> fpu/softfloat.c | 95 +++++++++++++++++++++++++++++++++++++++++--------
> 1 file changed, 81 insertions(+), 14 deletions(-)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index aa219223ff..15a272759d 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -211,8 +211,10 @@ typedef struct {
> * frac_shift: shift to normalise the fraction with DECOMPOSED_BINARY_POINT
> * The following are computed based the size of fraction
> * frac_lsb: least significant bit of fraction
> - * fram_lsbm1: the bit bellow the least significant bit (for rounding)
> + * frac_lsbm1: the bit bellow the least significant bit (for rounding)
"below" (I see this typo slipped past us the first time around)
thanks
-- PMM
- Re: [Qemu-devel] [PATCH v2 07/27] fpu/softfloat: Introduce parts_is_snan_frac, (continued)
- [Qemu-devel] [PATCH v2 08/27] fpu/softfloat: Replace float_class_dnan with parts_default_nan, Richard Henderson, 2018/05/11
- [Qemu-devel] [PATCH v2 09/27] fpu/softfloat: Replace float_class_msnan with parts_silence_nan, Richard Henderson, 2018/05/11
- [Qemu-devel] [PATCH v2 10/27] fpu/softfloat: re-factor float to float conversions, Richard Henderson, 2018/05/11
- [Qemu-devel] [PATCH v2 12/27] target/arm: Use floatX_silence_nan when we have already checked for SNaN, Richard Henderson, 2018/05/11
- [Qemu-devel] [PATCH v2 11/27] fpu/softfloat: support ARM Alternative half-precision, Richard Henderson, 2018/05/11
- Re: [Qemu-devel] [PATCH v2 11/27] fpu/softfloat: support ARM Alternative half-precision,
Peter Maydell <=
- [Qemu-devel] [PATCH v2 14/27] target/arm: squash FZ16 behaviour for conversions, Richard Henderson, 2018/05/11
- [Qemu-devel] [PATCH v2 15/27] target/arm: Fix fp_status_f16 tininess before rounding, Richard Henderson, 2018/05/11
- [Qemu-devel] [PATCH v2 13/27] target/arm: convert conversion helpers to fpst/ahp_flag, Richard Henderson, 2018/05/11
- [Qemu-devel] [PATCH v2 16/27] target/arm: Remove floatX_maybe_silence_nan from conversions, Richard Henderson, 2018/05/11
- [Qemu-devel] [PATCH v2 17/27] target/hppa: Remove floatX_maybe_silence_nan from conversions, Richard Henderson, 2018/05/11